.. |
dynamic_part_select
|
|
|
.gitignore
|
|
|
abc9.v
|
|
|
abc9.ys
|
|
|
aiger2.ys
|
|
|
aiger_dff.ys
|
|
|
async.sh
|
|
|
async.v
|
|
|
attrib05_port_conn.v
|
|
|
attrib05_port_conn.ys
|
|
|
attrib07_func_call.v
|
|
|
attrib07_func_call.ys
|
|
|
autoname.ys
|
|
|
blackbox_wb.ys
|
|
|
box_derive.ys
|
|
|
bug1496.ys
|
|
|
bug1531.ys
|
|
|
bug1614.ys
|
|
|
bug1710.ys
|
|
|
bug1745.ys
|
|
|
bug1781.ys
|
|
|
bug1876.ys
|
|
|
bug2014.ys
|
|
|
bug3462.ys
|
|
|
bug4082.ys
|
|
|
cellarray_array_connections.ys
|
|
|
celledges_shift.ys
|
|
|
check.ys
|
|
|
check_2.ys
|
|
|
check_3.ys
|
|
|
check_4.ys
|
|
|
chformal_check.ys
|
|
|
chformal_coverenable.ys
|
|
|
chparam.sh
|
|
|
clk2fflogic_effects.sh
|
|
|
clk2fflogic_effects.sv
|
|
|
const_arg_loop.sv
|
|
|
const_arg_loop.ys
|
|
|
const_func.sv
|
|
|
const_func.ys
|
|
|
const_func_block_var.v
|
|
|
const_func_block_var.ys
|
|
|
constant_drive_conflict.ys
|
|
|
constcomment.ys
|
|
|
constmsk_test.v
|
|
|
constmsk_test.ys
|
|
|
constmsk_testmap.v
|
|
|
countbits.sv
|
|
|
countbits.ys
|
|
|
deminout_unused.ys
|
|
|
design.ys
|
|
|
design1.ys
|
|
|
design2.ys
|
|
|
dynamic_part_select.ys
|
|
|
elab_sys_tasks.sv
|
|
|
elab_sys_tasks.ys
|
|
|
equiv_make_make_assert.ys
|
|
|
equiv_opt_multiclock.ys
|
|
|
equiv_opt_undef.ys
|
|
|
exec.ys
|
|
|
fib.v
|
|
|
fib.ys
|
|
|
fib_tern.v
|
|
|
fib_tern.ys
|
|
|
func_port_implied_dir.sv
|
|
|
func_port_implied_dir.ys
|
|
|
gen_if_null.v
|
|
|
gen_if_null.ys
|
|
|
global_scope.ys
|
|
|
gzip_verilog.v.gz
|
|
|
gzip_verilog.ys
|
|
|
help.ys
|
|
|
hierarchy.sh
|
|
|
hierarchy_defer.ys
|
|
|
hierarchy_generate.ys
|
|
|
hierarchy_param.ys
|
|
|
ice40_mince_abc9.ys
|
|
|
integer_range_bad_syntax.ys
|
|
|
integer_real_bad_syntax.ys
|
|
|
json_escape_chars.ys
|
|
|
logger_cmd_error.sh
|
|
|
logger_error.ys
|
|
|
logger_fail.sh
|
|
|
logger_nowarning.ys
|
|
|
logger_warn.ys
|
|
|
logger_warning.ys
|
|
|
logic_param_simple.ys
|
|
|
mem2reg.ys
|
|
|
memory_word_as_index.data
|
|
|
memory_word_as_index.v
|
|
|
memory_word_as_index.ys
|
|
|
muxcover.ys
|
|
|
muxpack.v
|
|
|
muxpack.ys
|
|
|
param_struct.ys
|
|
|
peepopt.ys
|
|
|
plugin.cc
|
|
|
plugin.sh
|
|
|
pmgen_reduce.ys
|
|
|
pmux2shiftx.v
|
|
|
pmux2shiftx.ys
|
|
|
port_sign_extend.v
|
|
|
port_sign_extend.ys
|
|
|
primitives.ys
|
|
|
printattr.ys
|
|
|
rand_const.sv
|
|
|
rand_const.ys
|
|
|
reg_wire_error.sv
|
|
|
reg_wire_error.ys
|
|
|
rename_scramble_name.ys
|
|
|
rtlil_signed_attribute.ys
|
|
|
rtlil_z_bits.ys
|
|
|
run-test.sh
|
|
|
scopeinfo.ys
|
|
|
scratchpad.ys
|
|
|
script.ys
|
|
|
sformatf.ys
|
|
|
shregmap.v
|
|
|
shregmap.ys
|
|
|
signed.ys
|
|
|
signext.ys
|
|
|
sim_const.ys
|
|
|
specify.v
|
|
|
specify.ys
|
|
|
src.ys
|
|
|
sta.ys
|
|
|
struct_access.sv
|
|
|
struct_access.ys
|
|
|
sub.v
|
|
|
submod.ys
|
|
|
submod_extract.ys
|
|
|
sv_defines.ys
|
|
|
sv_defines_dup.ys
|
|
|
sv_defines_mismatch.ys
|
|
|
sv_defines_too_few.ys
|
|
|
sv_implicit_ports.sh
|
|
|
svalways.sh
|
|
|
wreduce.ys
|
|
|
write_gzip.ys
|
|
|
xaiger.ys
|
|
|