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dynamic_part_select
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Add torture test for (* nowrshmsk *) stride optimization
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2024-01-10 20:28:36 +01:00 |
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.gitignore
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abc9.v
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abc9.ys
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aiger2.ys
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aiger2: Add test of writing a flattened view
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2024-10-07 12:04:33 +02:00 |
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aiger_dff.ys
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async.sh
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tests: use /usr/bin/env for bash.
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2023-08-12 11:59:39 +10:00 |
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async.v
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attrib05_port_conn.v
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attrib05_port_conn.ys
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attrib07_func_call.v
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attrib07_func_call.ys
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autoname.ys
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Remove references to ilang
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2024-11-05 12:36:31 +13:00 |
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blackbox_wb.ys
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box_derive.ys
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box_derive: Tune the test
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2024-05-29 20:42:11 +02:00 |
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bug1496.ys
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Remove references to ilang
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2024-11-05 12:36:31 +13:00 |
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bug1531.ys
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bug1614.ys
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bug1710.ys
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bug1745.ys
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bug1781.ys
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bug1876.ys
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bug2014.ys
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bug3462.ys
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bug4082.ys
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rtlil: Add wire deletion test
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2024-01-29 11:25:54 +01:00 |
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cellarray_array_connections.ys
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celledges_shift.ys
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celledges: Add test of shift cells edge data
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2024-01-19 11:14:10 +01:00 |
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check.ys
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check: Extend testing
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2024-03-11 10:45:17 +01:00 |
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check_2.ys
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check: Extend testing
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2024-03-11 10:45:17 +01:00 |
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check_3.ys
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check: Rephrase regex for portability
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2024-03-11 10:45:17 +01:00 |
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check_4.ys
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celledges: Add read ports arst paths
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2024-03-11 10:45:17 +01:00 |
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chformal_check.ys
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Additional tests for FV $check compatibility
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2024-02-02 16:07:10 +01:00 |
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chformal_coverenable.ys
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Additional tests for FV $check compatibility
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2024-02-02 16:07:10 +01:00 |
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chparam.sh
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tests: Run async2sync before sat and/or sim to handle $check cells
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2024-02-01 16:14:11 +01:00 |
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clk2fflogic_effects.sh
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clk2fflogic: Fix handling of $check cells
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2024-02-14 11:42:27 +01:00 |
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clk2fflogic_effects.sv
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clk2fflogic: Fix handling of $check cells
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2024-02-14 11:42:27 +01:00 |
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const_arg_loop.sv
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const_arg_loop.ys
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tests: Run async2sync before sat and/or sim to handle $check cells
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2024-02-01 16:14:11 +01:00 |
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const_func.sv
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const_func.ys
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tests: Run async2sync before sat and/or sim to handle $check cells
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2024-02-01 16:14:11 +01:00 |
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const_func_block_var.v
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const_func_block_var.ys
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constant_drive_conflict.ys
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check: Also check for conflicts with constant drivers
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2023-06-23 18:07:28 +02:00 |
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constcomment.ys
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constmsk_test.v
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constmsk_test.ys
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constmsk_testmap.v
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countbits.sv
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countbits.ys
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tests: Run async2sync before sat and/or sim to handle $check cells
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2024-02-01 16:14:11 +01:00 |
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deminout_unused.ys
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design.ys
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design1.ys
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design2.ys
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dynamic_part_select.ys
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Add torture test for (* nowrshmsk *) stride optimization
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2024-01-10 20:28:36 +01:00 |
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elab_sys_tasks.sv
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elab_sys_tasks.ys
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equiv_make_make_assert.ys
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equiv_opt_multiclock.ys
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equiv_opt_undef.ys
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Remove references to ilang
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2024-11-05 12:36:31 +13:00 |
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exec.ys
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fib.v
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fib.ys
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fib_tern.v
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fib_tern.ys
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func_port_implied_dir.sv
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func_port_implied_dir.ys
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gen_if_null.v
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gen_if_null.ys
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global_scope.ys
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gzip_verilog.v.gz
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gzip_verilog.ys
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help.ys
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tests: Fix invocation of 'help -cells'
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2023-07-10 12:42:09 +02:00 |
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hierarchy.sh
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hierarchy_defer.ys
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hierarchy_generate.ys
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add command that should not have any effect to hierarchy -generate test (this documents the current behavior, not sure if it is desired functionality)
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2024-04-12 13:51:06 +02:00 |
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hierarchy_param.ys
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ice40_mince_abc9.ys
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integer_range_bad_syntax.ys
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integer_real_bad_syntax.ys
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json_escape_chars.ys
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logger_cmd_error.sh
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Add test of error not getting silenced
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2024-10-07 14:49:17 +02:00 |
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logger_error.ys
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logger_fail.sh
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tests: use /usr/bin/env for bash.
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2023-08-12 11:59:39 +10:00 |
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logger_nowarning.ys
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logger_warn.ys
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logger_warning.ys
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logic_param_simple.ys
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mem2reg.ys
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memory_word_as_index.data
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memory_word_as_index.v
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memory_word_as_index.ys
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muxcover.ys
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muxcover: do not add decode muxes with x inputs
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2023-01-26 05:19:45 +00:00 |
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muxpack.v
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muxpack.ys
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param_struct.ys
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tests: Run async2sync before sat and/or sim to handle $check cells
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2024-02-01 16:14:11 +01:00 |
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peepopt.ys
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peepopt: Fix padding for the peepopt_shiftmul_right pattern
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2023-12-06 18:35:44 +01:00 |
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peepopt_formal.ys
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peepopt clockgateff: add testcase
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2024-08-07 10:21:52 +01:00 |
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plugin.cc
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plugin.sh
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pmgen_reduce.ys
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pmux2shiftx.v
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pmux2shiftx.ys
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port_sign_extend.v
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port_sign_extend.ys
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primitives.ys
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printattr.ys
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rand_const.sv
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rand_const.ys
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reg_wire_error.sv
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reg_wire_error.ys
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rename_scramble_name.ys
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rtlil_signed_attribute.ys
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Ensure signed constants are correctly parsed, represented, and exported in RTLIL. Add a test to check parsing and exporting
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2024-08-21 14:28:42 +01:00 |
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rtlil_z_bits.ys
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backends/rtlil: Do not shorten a value with z bits to 'x
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2023-01-29 14:02:25 +01:00 |
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run-test.sh
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scopeinfo.ys
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Test flatten and opt_clean's $scopeinfo handling
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2024-02-06 17:51:29 +01:00 |
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scratchpad.ys
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script.ys
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sformatf.ys
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ast: use new format string helpers.
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2023-08-11 04:46:52 +02:00 |
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shregmap.v
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shregmap.ys
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signed.ys
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signext.ys
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sim_const.ys
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specify.v
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specify.ys
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src.ys
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sta.ys
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struct_access.sv
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struct_access.ys
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tests: Run async2sync before sat and/or sim to handle $check cells
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2024-02-01 16:14:11 +01:00 |
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sub.v
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submod.ys
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submod_extract.ys
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sv_defines.ys
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sv_defines_dup.ys
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sv_defines_mismatch.ys
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sv_defines_too_few.ys
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sv_implicit_ports.sh
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tests: use /usr/bin/env for bash.
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2023-08-12 11:59:39 +10:00 |
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svalways.sh
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tests: use /usr/bin/env for bash.
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2023-08-12 11:59:39 +10:00 |
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wreduce.ys
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write_gzip.ys
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xaiger.ys
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