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Author	SHA1	Message	Date
Miodrag Milanovic	f37ac5d934	Fixes and error check	2022-03-09 09:48:29 +01:00
Miodrag Milanovic	ede348cdc2	cleanup	2022-03-07 16:32:32 +01:00
Miodrag Milanovic	1b1ecd4ab0	Error checks for aiger witness	2022-03-07 15:00:14 +01:00
Miodrag Milanovic	b6aca1d743	btor2 witness co-simulation	2022-03-07 13:59:36 +01:00
github-actions[bot]	7ba636cb32	Bump version	2022-03-05 01:06:31 +00:00
Miodrag Milanović	a95e5d505b	Merge pull request #3186 from nakengelhardt/smtbmc_sby_print_id ... add argument for printing cell names in yosys-smtbmc	2022-03-04 16:39:12 +01:00
Miodrag Milanović	13655ddccf	Merge pull request #3206 from YosysHQ/micko/quote_remove ... Remove quotes if any from attribute	2022-03-04 16:39:01 +01:00
Miodrag Milanović	c3124023e4	Merge pull request #3207 from nakengelhardt/json_escape_quotes ... fix handling of escaped chars in json backend and frontend (mostly)	2022-03-04 13:57:32 +01:00
Miodrag Milanovic	7be7f5e02e	Next dev cycle	2022-03-04 11:37:18 +01:00
Miodrag Milanovic	07a43689d8	Release version 0.15	2022-03-04 11:36:03 +01:00
Miodrag Milanovic	66ba5ed7a5	Update ABC	2022-03-04 11:32:15 +01:00
Miodrag Milanovic	a7090e9711	Update documentation	2022-03-04 10:56:33 +01:00
Miodrag Milanović	9581b9adac	Merge pull request #3219 from YosysHQ/micko/quick_vcd ... VCD reader support by using external tool	2022-03-04 10:42:14 +01:00
Miodrag Milanović	d1fbe738a7	Merge pull request #3220 from YosysHQ/claire/simstuff ... Add writing of aiw files to "sim" command	2022-03-04 10:41:02 +01:00
github-actions[bot]	e768f7552c	Bump version	2022-03-03 01:08:21 +00:00
Miodrag Milanovic	59983eda17	Add option to ignore X only signals in output	2022-03-02 16:02:13 +01:00
Miodrag Milanovic	48b56a4f7f	Write simulation files after simulation is performed	2022-03-02 15:23:07 +01:00
Miodrag Milanovic	3818e1160d	Update CHANGELOG	2022-03-02 14:26:15 +01:00
Claire Xen	2ca69e1b88	Merge pull request #3224 from YosysHQ/micko/refactor ... Micko/refactor	2022-03-02 13:52:18 +01:00
Miodrag Milanovic	28bc88a57e	Cleanup	2022-03-02 09:39:22 +01:00
github-actions[bot]	4a38d15f0d	Bump version	2022-03-01 01:12:24 +00:00
Miodrag Milanovic	94505395a9	Refactor sim output writers	2022-02-28 18:22:39 +01:00
Miodrag Milanovic	dfd4c81eac	Quick fix	2022-02-28 11:40:06 +01:00
Claire Xenia Wolf	56b968f61c	Add writing of aiw files to "sim" command ... Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>	2022-02-28 10:50:08 +01:00
Claire Xenia Wolf	1fd3a642c9	Hotfix in AIGER witness reader state machine ... Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>	2022-02-28 10:41:44 +01:00
Miodrag Milanovic	8be09b5b24	VCD reader support by using external tool	2022-02-28 09:09:07 +01:00
Miodrag Milanović	ec4af6af2f	Merge pull request #3216 from YosysHQ/claire/simstuff ... Co-simulation improvements and fixes	2022-02-28 08:19:54 +01:00
Miodrag Milanovic	9571acc0bf	Support extended aiw format	2022-02-27 16:37:40 +01:00
Miodrag Milanovic	fca168797e	Fix for last clock edge data	2022-02-25 16:15:32 +01:00
Claire Xenia Wolf	ca261d3c28	Experimental sim changes	2022-02-25 16:02:06 +01:00
github-actions[bot]	08c771078f	Bump version	2022-02-25 01:04:22 +00:00
YRabbit	22d9bbb308	gowin: Remove unnecessary attributes ... Signed-off-by: YRabbit <rabbit@yrabbit.cyou>	2022-02-24 05:38:33 +01:00
YRabbit	9b3cd4f0d8	gowin: Add support for true differential output ... Signed-off-by: YRabbit <rabbit@yrabbit.cyou>	2022-02-24 05:38:33 +01:00
N. Engelhardt	dc739362c7	print cell name for properties in yosys-smtbmc	2022-02-22 17:00:10 +01:00
Claire Xen	a41c1df76f	Merge pull request #3211 from YosysHQ/micko/witness ... Add support for AIGER witness files in "sim" command	2022-02-22 16:22:06 +01:00
Claire Xen	ac294ed419	Merge pull request #3197 from YosysHQ/claire/smtbmcfix ... Add a bit of flexibilty re AIG witness trace length to smtbmc.py	2022-02-22 15:26:22 +01:00
github-actions[bot]	286caa09bd	Bump version	2022-02-22 00:59:35 +00:00
Miodrag Milanović	d0b72e75d9	Merge pull request #3203 from YosysHQ/micko/sim_ff ... Simulation for various FF types	2022-02-21 17:57:44 +01:00
Marcelina Kościelnicka	d0f4d0b153	ecp5: Do not use specify in generate in cells_sim.v.	2022-02-21 17:52:31 +01:00
Miodrag Milanovic	fd3f08753a	Fix handling of ce_over_srst	2022-02-21 16:36:12 +01:00
N. Engelhardt	8fd1b06249	fix handling of escaped chars in json backend and frontend	2022-02-18 17:13:09 +01:00
Claire Xenia Wolf	1aa9ad25d0	Fix cycle 0 in aiger witness co-simulation ... Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>	2022-02-18 16:27:41 +01:00
Miodrag Milanovic	5f918803de	Changed error message	2022-02-18 15:06:49 +01:00
Miodrag Milanovic	41754b4207	Added AIGER witness file co simulation	2022-02-18 15:04:02 +01:00
Miodrag Milanovic	13a5c28459	simplify logic of handling flip-flops and latches	2022-02-18 09:17:36 +01:00
Miodrag Milanovic	61752b255f	Review cleanup	2022-02-17 17:18:36 +01:00
Miodrag Milanovic	29293a57bb	Remove quotes if any from attribute	2022-02-16 19:10:13 +01:00
Miodrag Milanovic	21baf48e04	test dlatchsr and adlatch	2022-02-16 13:58:51 +01:00
Miodrag Milanovic	271ac28b41	Added test cases	2022-02-16 13:27:59 +01:00
Miodrag Milanovic	fb22d7cdc4	Add support for various ff/latch cells simulation	2022-02-16 13:27:59 +01:00