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Author SHA1 Message Date
whitequark
698ab9beee synth_ecp5: rename dram to lutram everywhere. 2019-07-16 20:45:12 +00:00
whitequark
ba099bfe9b synth_{ice40,ecp5}: more sensible pass label naming. 2019-07-16 20:41:51 +00:00
Eddie Hung
7a58ee78dc gen_lut to return correctly sized LUT mask 2019-07-16 12:45:29 -07:00
Eddie Hung
8a2a2cd035 Forgot to commit 2019-07-16 12:44:26 -07:00
Eddie Hung
dd10d2b00d Add tests for cmp2lut on LUT6 2019-07-16 12:11:59 -07:00
David Shah
d38df68d26 xilinx: Add correct signed behaviour to DSP48E1 model 
Signed-off-by: David Shah <dave@ds0.me>
 2019-07-16 17:53:08 +01:00
Eddie Hung
5939b5d636
Merge pull request #1188 from YosysHQ/eddie/abc9_push_inverters 
abc9: push inverters driving box inputs (comb outputs) through $lut soft logic
 2019-07-16 08:53:47 -07:00
Eddie Hung
ba8ccbdea8
Merge pull request #1186 from YosysHQ/eddie/abc9_ice40_fix 
abc9/ice40: encapsulate SB_CARRY+SB_LUT4 into one box
 2019-07-16 08:52:14 -07:00
David Shah
95c8d27b0b xilinx: Treat DSP48E1 as 24x17 unsigned for now (actual behaviour is 25x18 signed) 
Signed-off-by: David Shah <dave@ds0.me>
 2019-07-16 16:47:53 +01:00
David Shah
8da4c1ad82 mul2dsp: Fix edge case where Y_WIDTH is less than B_WIDTH+`DSP_A_MAXWIDTH 
Signed-off-by: David Shah <dave@ds0.me>
 2019-07-16 16:44:40 +01:00
David Shah
7a75f5f3ac mul2dsp: Fix indentation 
Signed-off-by: David Shah <dave@ds0.me>
 2019-07-16 16:19:32 +01:00
Clifford Wolf
a1a04ea79c
Merge pull request #1200 from mmicko/fix_typo_liberty_cc 
Fix typo, double "of"
 2019-07-16 15:27:25 +02:00
Clifford Wolf
928f0a4438
Merge pull request #1199 from mmicko/extract_fa_fix 
Fix check logic in extract_fa
 2019-07-16 15:27:09 +02:00
Miodrag Milanovic
6cce679b35 Fix typo, double "of" 2019-07-16 11:03:30 +02:00
Miodrag Milanovic
2b469e82a7 Fix check logic in extract_fa 2019-07-16 10:35:18 +02:00
Eddie Hung
fd5b3593d8 Do not swap if equals 2019-07-15 16:52:37 -07:00
Eddie Hung
b29f26f6c7 SigSpec::extend_u0() to return *this 2019-07-15 16:23:12 -07:00
Eddie Hung
5f00d335d4 Oops forgot these files 2019-07-15 15:03:15 -07:00
Eddie Hung
dd59375a66 Add xilinx_dsp for register packing 2019-07-15 14:46:31 -07:00
Eddie Hung
42f8e68e76 OUT port to Y in generic DSP 2019-07-15 14:45:47 -07:00
Eddie Hung
0c7ee6d0fa Move DSP mapping back out to dsp_map.v 2019-07-15 14:18:44 -07:00
Eddie Hung
87db41a2bb
Merge pull request #1196 from YosysHQ/eddie/fix1178 
Fix different synth results between with and without debug output "-g"
 2019-07-15 13:31:08 -07:00
Eddie Hung
5fb27c071b $__ICE40_CARRY_LUT4 -> $__ICE40_FULL_ADDER as per @whitequark 2019-07-15 12:03:51 -07:00
Eddie Hung
91fcf034bc Only swap if B_WIDTH > A_WIDTH 2019-07-15 11:24:11 -07:00
Eddie Hung
1793e6018a Tidy up 2019-07-15 11:19:54 -07:00
Eddie Hung
20e3d2d9b0 Move DSP48E1 model out of cells_xtra, initial multiply one in cells_sim 2019-07-15 11:13:22 -07:00
Clifford Wolf
2a7198db51
Merge pull request #1189 from YosysHQ/eddie/fix1151 
Error out if enable > dbits in memory_bram file
 2019-07-15 20:06:35 +02:00
Clifford Wolf
2c5c53e4c1
Merge pull request #1190 from YosysHQ/eddie/fix_1099 
extract_fa to return nothing more gracefully
 2019-07-15 20:05:56 +02:00
Clifford Wolf
196c9c22b2
Merge pull request #1191 from whitequark/opt_lut-log_debug 
Make opt_lut less chatty
 2019-07-15 20:04:00 +02:00
Clifford Wolf
46144f2750
Merge pull request #1195 from Roman-Parise/master 
Updated FreeBSD dependencies in README.md
 2019-07-15 20:01:38 +02:00
Clifford Wolf
bf8bb54c1a
Merge pull request #1197 from nakengelhardt/handle-setrlimit-fail 
smt: handle failure of setrlimit syscall
 2019-07-15 19:42:11 +02:00
Eddie Hung
146451a767 Merge remote-tracking branch 'origin/master' into xc7dsp 2019-07-15 09:49:41 -07:00
Eddie Hung
06f94c92d4 Revert "Add log_checkpoint function and use it in opt_muxtree" 
This reverts commit 0e6c83027f.
 2019-07-15 08:35:48 -07:00
N. Engelhardt
ab4b9e8db4 smt: handle failure of setrlimit syscall 2019-07-15 23:33:18 +08:00
Eddie Hung
78560aac86 Revert "Fix first divergence in #1178" 
This reverts commit 1122a2e067.
 2019-07-15 08:31:26 -07:00
Eddie Hung
7129a03083 Merge branch 'master' into eddie/fix1178 2019-07-15 08:23:01 -07:00
Clifford Wolf
44fd459c79 Redesign log_id_cache so that it doesn't keep IdString instances referenced, fixes #1178 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-07-15 17:10:42 +02:00
Clifford Wolf
0e6c83027f Add log_checkpoint function and use it in opt_muxtree 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-07-15 12:12:21 +02:00
Eddie Hung
a97d30d2f8
Merge pull request #1194 from cr1901/miss-semi 
Fix missing semicolon in Windows-specific code in aigerparse.cc.
 2019-07-14 13:36:34 -07:00
William D. Jones
da5d64d71e Fix missing semicolon in Windows-specific code in aigerparse.cc. 
Signed-off-by: William D. Jones <thor0505@comcast.net>
 2019-07-14 13:52:27 -04:00
Roman-Parise
f7ab7a418c Updated FreeBSD dependencies in README.md 2019-07-14 09:25:07 -07:00
whitequark
2de7e92bb8 opt_lut: make less chatty. 2019-07-13 16:49:56 +00:00
Eddie Hung
9b91d815b5 If ConstEval fails do not log_abort() but return gracefully 2019-07-13 04:13:57 -07:00
Eddie Hung
ab3917d079 Error out if enable > dbits 2019-07-13 03:39:23 -07:00
Eddie Hung
d032198fac ice40_opt to $__ICE40_CARRY_LUT4 into $lut not SB_LUT 2019-07-13 01:11:00 -07:00
Eddie Hung
fb062c3426 Add comment 2019-07-13 00:52:21 -07:00
Eddie Hung
41243a53b3 Update test with more accurate LUT mask 2019-07-12 21:00:59 -07:00
Eddie Hung
e9bdc86c0e duplicate -> clone 2019-07-12 19:33:02 -07:00
Eddie Hung
be0cb7f4b8 More cleanup 2019-07-12 19:30:18 -07:00
Eddie Hung
7d583f9e57 Cleanup 2019-07-12 19:30:18 -07:00