255 commits

Author	SHA1	Message	Date
Clifford Wolf	3c49e3c5b3	Add $rose/$fell support to Verific bindings ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-03-01 10:12:15 +01:00
Clifford Wolf	5ac3ee858a	Add support for PRIM_SVA_UNTIL to new SVA importer ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-02-28 15:32:17 +01:00
Clifford Wolf	8a1d6ccf0c	Add DFSM generator to verific SVA importer ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-02-28 15:05:33 +01:00
Clifford Wolf	15902d495f	Continue refactoring of Verific SVA importer code ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-02-28 11:45:04 +01:00
Clifford Wolf	25e33d7ab8	Major redesign of Verific SVA importer ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-02-27 20:33:15 +01:00
Clifford Wolf	b6fbeb0969	Add handling of verific OPER_REDUCE_NOR ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-02-26 15:26:01 +01:00
Clifford Wolf	2aeb4d4e12	Add handling of verific OPER_SELECTOR and OPER_WIDE_SELECTOR ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-02-26 15:20:27 +01:00
Clifford Wolf	9cd9f5fc78	Add handling of verific OPER_NTO1MUX and OPER_WIDE_NTO1MUX ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-02-26 15:02:03 +01:00
Clifford Wolf	d1cb5150aa	Add "SVA syntax cheat sheet" comment to verificsva.cc ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-02-26 14:31:58 +01:00
Clifford Wolf	2521ed305e	Add Verific SVA support for ranges in repetition operator	2018-02-22 12:37:30 +01:00
Clifford Wolf	6d12c83d36	Add support for SVA throughout via Verific	2018-02-21 13:09:47 +01:00
Clifford Wolf	5c6247dfa6	Add support for SVA sequence concatenation ranges via verific ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-02-18 16:35:06 +01:00
Clifford Wolf	9d963cd29c	Add support for SVA until statements via Verific ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-02-18 14:57:52 +01:00
Clifford Wolf	5fa2aa2741	Move Verific SVA importer to extra C++ source file ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-02-18 13:52:49 +01:00
Clifford Wolf	c4bf34f6ce	Merge Verific SVA preprocessor and SVA importer	2018-02-18 13:28:08 +01:00
Clifford Wolf	bc8ab3ab44	Fix verific PRIM_SVA_AT handling in properties with PRIM_SVA_DISABLE_IFF	2018-02-15 15:26:37 +01:00
Clifford Wolf	6c00e064e2	Fix single-bit $stable handling in verific front-end ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-02-01 12:51:49 +01:00
Clifford Wolf	9af40faa0b	Add Verific attribute handling for assert/assume/cover/live/fair cells ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-01-31 19:06:51 +01:00
Clifford Wolf	675f53abbb	Fix permissions on verific vdb files	2018-01-28 18:52:01 +01:00
Clifford Wolf	1d8161b432	Fixed handling of synchronous and asynchronous assertion/assumption/cover in verific bindings ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-01-23 17:42:40 +01:00
Clifford Wolf	ba90e08398	Add support for Verific PRIM_SVA_NOT properties	2017-12-10 01:10:03 +01:00
Clifford Wolf	e4a4c0e10c	Add Verific OPER_SVA_STABLE support	2017-12-10 00:59:44 +01:00
Clifford Wolf	27916105a9	Refactoring Verific SVA rewriter	2017-12-10 00:26:26 +01:00
Clifford Wolf	0a31a0b3ae	Remove all PSL support code from verific.cc	2017-10-20 13:14:04 +02:00
Clifford Wolf	1954c78ea7	Add "verific -vlog-libdir"	2017-10-13 20:23:19 +02:00
Clifford Wolf	e7a3c47cc7	Add "verific -vlog-incdir" and "verific -vlog-define"	2017-10-13 20:12:51 +02:00
Clifford Wolf	05068af880	Update Verific README	2017-10-13 17:11:53 +02:00
Clifford Wolf	bc5cc4e103	Add Verific fairness/liveness support	2017-10-12 12:00:09 +02:00
Clifford Wolf	c10e96c9ec	Start work on pre-processor for Verific SVA properties	2017-10-10 15:16:39 +02:00
Clifford Wolf	fc3378916d	Improve handling of Verific errors	2017-10-05 14:38:32 +02:00
Clifford Wolf	ee56a887b6	Improve Verific error handling, check VHDL static asserts	2017-10-04 18:56:28 +02:00
Clifford Wolf	b92ff2706e	Fix nasty bug in Verific bindings	2017-10-04 17:23:42 +02:00
Clifford Wolf	15073790bf	Add merging of "past FFs" to verific importer	2017-07-29 00:10:38 +02:00
Clifford Wolf	d4b9602cbd	Add minimal support for PSL in VHDL via Verific	2017-07-28 17:39:49 +02:00
Clifford Wolf	5a828fff34	Improve Verific HDL language options	2017-07-28 15:32:54 +02:00
Clifford Wolf	acd6cfaf67	Fix handling of non-user-declared Verific netbus	2017-07-28 11:31:27 +02:00
Clifford Wolf	c1cfca8f54	Improve Verific SVA importer	2017-07-27 14:05:09 +02:00
Clifford Wolf	2336d5508b	Add log_warning_noprefix() API, Use for Verific warnings and errors	2017-07-27 12:17:04 +02:00
Clifford Wolf	d9641621d9	Add "verific -import -n" and "verific -import -nosva"	2017-07-27 11:54:45 +02:00
Clifford Wolf	90d8329f64	Improve Verific SVA import: negedge and $past	2017-07-27 11:40:07 +02:00
Clifford Wolf	147ff96ba3	Improve Verific SVA importer	2017-07-27 10:39:39 +02:00
Clifford Wolf	530040ba6f	Improve Verific bindings (mostly related to SVA)	2017-07-26 18:00:01 +02:00
Clifford Wolf	abd3b4e8e7	Improve "help verific" message	2017-07-25 15:13:22 +02:00
Clifford Wolf	6dbe1d4c92	Add "verific -extnets"	2017-07-25 14:53:11 +02:00
Clifford Wolf	c97c92e4ec	Improve "verific -all" handling	2017-07-25 13:33:25 +02:00
Clifford Wolf	41be530c4e	Add "verific -import -d <dump_file"	2017-07-24 13:57:16 +02:00
Clifford Wolf	92d3aad670	Add "verific -import -flatten" and "verific -import -v"	2017-07-24 11:29:06 +02:00
Clifford Wolf	5be535517c	Add "verific -import -k"	2017-07-22 16:16:44 +02:00
Clifford Wolf	2785aaffeb	Improve docs for verific bindings, add simply sby example	2017-07-22 11:58:51 +02:00
Clifford Wolf	28039c3063	Add Verific Release information to log	2017-07-04 20:01:30 +02:00