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Author SHA1 Message Date
Sean Cross
c1b628508d backends: smt2: use $(CXX) variable for compiler 
The Makefile assumes the compiler is called `gcc`, which isn't always
true.  In fact, if we're building on msys2 or msys2-64, the compiler
is called `i686-w64-mingw32-g++` or `x86_64-w64-mingw32-g++`.

Use the variable instead of hardcoding the name, to fix building on
these systems.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-09-08 15:47:09 +08:00
Marcin Kościelnicki
fda94311ee synth_xilinx: Support init values on Spartan 6 flip-flops properly. 2019-09-07 16:30:43 +02:00
Marcin Kościelnicki
a82e8df7d3 techmap: Add support for extracting init values of ports 2019-09-07 16:30:43 +02:00
Eddie Hung
de8adecd39 Merge branch 'master' of github.com:YosysHQ/yosys 2019-09-06 22:52:00 -07:00
Eddie Hung
173c7936c3 Add missing -assert to equiv_opt 2019-09-06 22:51:44 -07:00
Eddie Hung
903cd58acf
Merge pull request #1312 from YosysHQ/xaig_arrival 
Allow arrival times of sequential outputs to be specified to abc9
 2019-09-05 12:00:23 -07:00
Clifford Wolf
58ec1df4c2 Bump version 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-09-05 19:05:13 +02:00
Clifford Wolf
4b7202c9c2
Merge pull request #1350 from YosysHQ/clifford/fixsby59 
Properly construct $live and $fair cells from "if (...) assume/assert (s_eventually ...)"
 2019-09-05 18:14:28 +02:00
Clifford Wolf
82784c279d
Merge pull request #1330 from YosysHQ/clifford/fix1145 
Add flatten handling of pre-existing wires as created by interfaces
 2019-09-05 18:10:40 +02:00
Clifford Wolf
71d355560e Update README.md 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-09-05 17:20:29 +02:00
Clifford Wolf
30f1ac7ce9 Rename conflicting wires on flatten/techmap, add "hierconn" attribute, fixes #1220 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-09-05 13:51:53 +02:00
Clifford Wolf
694a8f75cf Add flatten handling of pre-existing wires as created by interfaces, fixes #1145 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-09-05 13:30:58 +02:00
whitequark
8d91960663
Merge pull request #1356 from emilazy/fix-makefile-shell 
Use $(shell :; ...) in Makefile to force shell
 2019-09-05 00:20:47 +00:00
Emily
a9af28694c Use $(shell :; ...) in Makefile to force shell 
Did you think that `$(shell command -v ...)` would actually get run by
the shell? Foolish mortal; GNU Make is obviously far more wise than
thee, as it optimizes it to a direct -- and hence broken (since
`command` is a shell builtin) -- exec. This horrifying contortion
ensures that an actual shell runs the command and fixes the behaviour.

@Shizmob found the source of this misbehaviour; turns out gmake has a
hard-coded, incomplete list of shell builtins:

    715c787dc6/src/job.c (L2691)

This contains `command`, but the whole function is full of horrible
heuristic garbage so who knows. I'm so sorry.
 2019-09-05 00:43:30 +01:00
Eddie Hung
aa1491add3 Resolve TODO with pin assignments for SRL* 2019-09-04 15:47:36 -07:00
Eddie Hung
ba629e6a28 Merge remote-tracking branch 'origin/master' into xaig_arrival 2019-09-04 15:36:07 -07:00
whitequark
8c1a982494
Merge pull request #1354 from emilazy/remove-which-use 
Replace `which` with `command -v` in Makefile too
 2019-09-04 18:55:17 +00:00
Emily
a7ea6a6fcf Replace which with command -v in Makefile too 2019-09-04 19:01:00 +01:00
Eddie Hung
3c462e5eeb
Merge pull request #1338 from YosysHQ/eddie/deferred_top 
hierarchy -auto-top to work with (* top *) modules from read/read_verilog -defer
 2019-09-04 10:55:41 -07:00
Eddie Hung
d2306d7b1d Adopt @cliffordwolf's suggestion 2019-09-03 12:18:50 -07:00
Eddie Hung
0ca0706630 Expand test with `hierarchy' without -auto-top 2019-09-03 12:17:26 -07:00
Eddie Hung
8124716830 Add read -noverific before read 2019-09-03 10:52:34 -07:00
Eddie Hung
d6a84a78a7 Merge remote-tracking branch 'origin/master' into eddie/deferred_top 2019-09-03 10:49:21 -07:00
Clifford Wolf
58af64b63a
Merge pull request #1351 from emilazy/remove-which-use 
Use `command -v` rather than `which`
 2019-09-03 09:27:47 +02:00
Emily
69a5dea89e Use command -v rather than which 2019-09-03 00:57:32 +01:00
Clifford Wolf
25e5fbac90 Properly construct $live and $fair cells from "if (...) assume/assert (s_eventually ...)" 
Fixes https://github.com/YosysHQ/SymbiYosys/issues/59

Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-09-02 22:56:38 +02:00
Eddie Hung
3459d28349 Add comments 2019-09-02 12:22:15 -07:00
Eddie Hung
696f854801 Rename box 2019-09-02 12:15:11 -07:00
Eddie Hung
2fa3857963 Merge remote-tracking branch 'origin/master' into xaig_arrival 2019-09-02 12:13:44 -07:00
Eddie Hung
7e8f7f4c59 Merge branch 'master' of github.com:YosysHQ/yosys 2019-09-02 12:13:33 -07:00
Eddie Hung
f76cb58494 Recognise built-in types (e.g. $_DFF_*) 2019-09-02 12:13:25 -07:00
Eddie Hung
4aa505d1b2
Merge pull request #1344 from YosysHQ/eddie/ice40_signed_macc 
ice40_dsp to allow signed multipliers
 2019-09-01 10:11:33 -07:00
Clifford Wolf
4a7bc8c772
Merge pull request #1347 from mmicko/fix_select_error_msg 
Fix select command error msg, fixes issue #1081
 2019-09-01 13:30:57 +02:00
David Shah
68fe1eba6c
Merge pull request #1346 from mmicko/fix_ecp5_cells_sim 
Fix TRELLIS_FF simulation model
 2019-09-01 10:01:27 +01:00
Miodrag Milanovic
fa5065e9b5 Fix select command error msg, fixes issue #1081 2019-09-01 11:00:09 +02:00
Miodrag Milanovic
a3c16a0565 Fix TRELLIS_FF simulation model 2019-08-31 11:12:06 +02:00
David Shah
90b44113d8 ecp5_gsr: Fix typo 
Signed-off-by: David Shah <dave@ds0.me>
 2019-08-31 09:58:46 +01:00
Eddie Hung
4290548de3 Make abc9 test a bit more interesting 2019-08-30 20:31:53 -07:00
Eddie Hung
e9bb252e77 Recognise built-in types (e.g. $_DFF_*) 2019-08-30 20:15:09 -07:00
Eddie Hung
f33abd4eab Remove trailing space 2019-08-30 16:44:11 -07:00
Eddie Hung
17b77fd411 Missing dep for test_pmgen 2019-08-30 14:01:07 -07:00
Eddie Hung
c7f1ccbcb0 Merge remote-tracking branch 'origin/master' into xaig_arrival 2019-08-30 12:28:35 -07:00
Eddie Hung
999fb33fd0
Merge pull request #1340 from YosysHQ/eddie/abc_no_clean 
abc9 to not call "clean" at end of run (often called outside)
 2019-08-30 12:27:09 -07:00
Eddie Hung
76a52712da Improve tests/ice40/macc.ys for SB_MAC16 2019-08-30 12:22:59 -07:00
Eddie Hung
c1459bc748 Do not restrict multiplier to unsigned 2019-08-30 12:22:14 -07:00
Eddie Hung
eef0676105
Merge pull request #1310 from SergeyDegtyar/master 
Add new tests for ice40 architecture
 2019-08-30 10:54:22 -07:00
Eddie Hung
d87a6f6303 Merge remote-tracking branch 'origin/master' into xaig_arrival 2019-08-30 10:32:58 -07:00
Eddie Hung
36e38ed46a
Merge pull request #1321 from YosysHQ/eddie/xilinx_srl 
xilinx_srl pass for shift register extraction
 2019-08-30 10:32:03 -07:00
Eddie Hung
d2d2816f8c Merge branch 'eddie/xilinx_srl' into xaig_arrival 2019-08-30 10:30:54 -07:00
Eddie Hung
f0fef90e9d Merge remote-tracking branch 'origin/master' into xaig_arrival 2019-08-30 10:30:46 -07:00