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Author	SHA1	Message	Date
Clifford Wolf	b659ffb457	Fixed generation of smt2 concat statements	2015-08-15 11:45:44 +02:00
Larry Doolittle	1e67b29919	Fix version strings for out-of-tree builds ... Still assumes source tree is a git repository	2015-08-14 23:27:19 +02:00
Larry Doolittle	6c00704a5e	Another block of spelling fixes ... Smaller this time	2015-08-14 23:27:05 +02:00
Larry Doolittle	022f570563	Keep gcc from complaining about uninitialized variables	2015-08-14 23:26:49 +02:00
Clifford Wolf	0350074819	Re-created command-reference-manual.tex, copied some doc fixes to online help	2015-08-14 11:27:19 +02:00
Clifford Wolf	84bf862f7c	Spell check (by Larry Doolittle)	2015-08-14 10:56:05 +02:00
Clifford Wolf	80910d13a6	Merge branch 'master' of github.com:cliffordwolf/yosys	2015-08-13 09:52:06 +02:00
Clifford Wolf	c699d7c614	More ASCII encoding fixes	2015-08-13 09:42:24 +02:00
Clifford Wolf	ad8efeb13f	Fixed CRLF line endings	2015-08-13 09:35:00 +02:00
Clifford Wolf	08ad5409a2	Some ASCII encoding fixes (comments and docs) by Larry Doolittle	2015-08-13 09:30:20 +02:00
Clifford Wolf	698357dd9a	Added "write_smt2 -regs"	2015-08-12 17:13:54 +02:00
Clifford Wolf	fc20b1c3d2	Fixed "make clean" for out-of-tree builds	2015-08-12 16:54:30 +02:00
Clifford Wolf	e4ef000b70	Adjust makefiles to work with out-of-tree builds ... This is based on work done by Larry Doolittle	2015-08-12 15:04:44 +02:00
Clifford Wolf	c43f38c81b	Improved handling of "keep" attributes in hierarchical designs in opt_clean	2015-08-12 14:10:14 +02:00
Clifford Wolf	bc468cb6f2	Fixed hashlib for 64 bit int keys	2015-08-12 13:37:09 +02:00
Clifford Wolf	f81bf9bdea	Added SMV back-end 'test_cells.sh' script	2015-08-12 12:56:20 +02:00
Clifford Wolf	667b015018	Merge pull request #70 from gaomy3832/bugfix ... Remove unused blackbox modules in opt_clean.	2015-08-12 08:45:04 +02:00
Mingyu Gao	cbda56d178	Remove unused blackbox modules in opt_clean.	2015-08-11 09:51:08 -07:00
Mingyu Gao	8c4c62f3e1	Bugfix for cell hash cache option in opt_share.	2015-08-11 11:40:23 +02:00
Clifford Wolf	45ee2ba3b8	Fixed handling of [a-fxz?] in decimal constants	2015-08-11 11:32:37 +02:00
Clifford Wolf	2185125760	Added missing ct_all setup to opt_clean	2015-08-11 07:54:32 +02:00
Mingyu Gao	021b4a2436	Bugfix for cell hash cache option in opt_share.	2015-08-10 13:01:44 -07:00
Clifford Wolf	883e09d8ed	Use MEMID as name for $mem cell	2015-08-09 13:35:44 +02:00
Clifford Wolf	3565e89a8b	Merge pull request #69 from zeldin/master ... Added iCE40 WARMBOOT cell	2015-08-07 00:03:39 +02:00
Marcus Comstedt	c9e56bc428	Added iCE40 WARMBOOT cell	2015-08-06 22:58:17 +02:00
Clifford Wolf	6834461f65	Remove some very strange whitespace in btor.cc (by Larry Doolittle)	2015-08-05 22:11:26 +02:00
Clifford Wolf	5dc23975eb	Bugfix in SMV back-end for partially unassigned wires	2015-08-05 11:36:26 +02:00
Clifford Wolf	4e4b156e13	Added ENABLE_LIBYOSYS Makefile option	2015-08-04 20:25:26 +02:00
Clifford Wolf	c7fd3fbb68	Added $assert support to SMV back-end	2015-08-04 20:05:37 +02:00
Clifford Wolf	31b555ae72	Added libyosys.so build	2015-08-04 13:22:49 +02:00
Clifford Wolf	c63e5ed7ec	Merge pull request #68 from zeldin/master ... Add -noautowire option to verilog frontend	2015-08-01 12:52:10 +02:00
Marcus Comstedt	c836faae3e	Add -noautowire option to verilog frontend	2015-08-01 12:16:54 +02:00
Clifford Wolf	8d6d5c30d9	Added WORDS parameter to $meminit	2015-07-31 10:40:09 +02:00
Clifford Wolf	3860c9a9f2	Fixed flatten $meminit handling	2015-07-30 21:43:41 +02:00
Clifford Wolf	eac0bcd7d3	Improvements in BLIF back-end	2015-07-29 17:06:19 +02:00
Clifford Wolf	4513ff1b85	Fixed nested mem2reg	2015-07-29 16:37:08 +02:00
Clifford Wolf	516e8828f2	Don't write a 17th memory bit in ice40/cells_sim (by Larry Doolittle)	2015-07-27 22:44:01 +02:00
Clifford Wolf	4d0ba9b3b2	Fixed "check" command for inout ports	2015-07-27 09:54:58 +02:00
Clifford Wolf	2a613b1b66	Some cleanups in opt_rmdff	2015-07-25 12:09:57 +02:00
Clifford Wolf	badc5f7eb9	Added "miter -assert"	2015-07-25 12:09:57 +02:00
Clifford Wolf	2397078485	Keep modules with $assume (like $assert)	2015-07-25 12:09:57 +02:00
Clifford Wolf	914ae3401e	Improved $adff simplification	2015-07-24 14:12:50 +02:00
Clifford Wolf	c6ca4780e2	iCE40 DFF sim models: init Q regs to 0	2015-07-20 13:05:18 +02:00
Clifford Wolf	ad919ae4e3	Fixed techmap processes error msg	2015-07-18 12:16:27 +02:00
Clifford Wolf	54588a276a	Avoid tristate warning for blackbox ice40/cells_sim.v	2015-07-18 11:59:04 +02:00
Clifford Wolf	8393f70538	Some fixes in "select" command	2015-07-16 22:10:26 +02:00
Clifford Wolf	55acc51ad4	Fixed YosysJS.create_worker() usage of this.url_prefix	2015-07-10 13:20:57 +02:00
Clifford Wolf	85aaf08e53	Improved liberty file test case	2015-07-06 17:45:56 +02:00
Clifford Wolf	3049a08912	Updated ABC	2015-07-06 17:45:40 +02:00
Clifford Wolf	d2ff5d9994	Do not collect disabled $memwr cells	2015-07-06 13:28:00 +02:00