1448 commits

Author	SHA1	Message	Date
Alberto Gonzalez	bd54d67ad4	Further clean up passes/techmap/techmap.cc. ... Co-Authored-By: Eddie Hung <eddie@fpgeh.com>	2020-05-14 20:06:54 +00:00
Alberto Gonzalez	982562ff13	Use emplace() for more efficient insertion into various dicts.	2020-05-14 20:06:54 +00:00
Alberto Gonzalez	c658d9d59d	Build constant bits directly rather than constructing an object and copying its bits.	2020-05-14 20:06:54 +00:00
Alberto Gonzalez	f235f212ea	Replace std::set with pool for cell_to_inbit and outbit_to_cell.	2020-05-14 20:06:54 +00:00
Alberto Gonzalez	6294621825	Use emplace() rather than insert().	2020-05-14 20:06:54 +00:00
Alberto Gonzalez	dfcb936cd5	Clean up pseudo-private member usage and ensure range iteration uses references where possible to avoid unnecessary copies.	2020-05-14 20:06:54 +00:00
Alberto Gonzalez	a4755c50c3	Clean up extraneous buffer.	2020-05-14 20:06:54 +00:00
Alberto Gonzalez	7857782575	Replace std::map with dict for unique_bit_id.	2020-05-14 20:06:54 +00:00
Alberto Gonzalez	6d64d768b0	Replace std::map with dict for port_new2old_map, port_connmap, and cellbits_to_tplbits.	2020-05-14 20:06:54 +00:00
Alberto Gonzalez	5cb4ae4666	Replace std::map with dict for connbits_map, cell_to_inbit, and outbit_to_cell.	2020-05-14 20:06:54 +00:00
Alberto Gonzalez	c43017fc08	Replace std::map with dict for TechmapWires type.	2020-05-14 20:06:54 +00:00
Alberto Gonzalez	644e55b3d3	Replace std::map with dict for celltypeMap.	2020-05-14 20:06:53 +00:00
Alberto Gonzalez	67f4046c05	Replace std::set with pool for handled_cells and techmap_wire_names.	2020-05-14 20:06:53 +00:00
Alberto Gonzalez	64c16f8c13	Replace std::map with dict for positional_ports.	2020-05-14 20:06:53 +00:00
Alberto Gonzalez	2fb4931e5b	Add specialized hash() for type dict and use a dict instead of a std::map for techmap_cache and techmap_do_cache.	2020-05-14 20:06:53 +00:00
Alberto Gonzalez	437f3fb342	Replace std::map with dict for simplemap_mappers.	2020-05-14 20:06:53 +00:00
Alberto Gonzalez	99b586b283	Use nullptr instead of NULL in passes/techmap/techmap.cc.	2020-05-14 20:06:53 +00:00
Alberto Gonzalez	5f7f213c7f	Replace std::string and RTLIL::IdString with IdString in passes/techmap/techmap.cc. ... Co-Authored-By: Eddie Hung <eddie@fpgeh.com>	2020-05-14 20:06:53 +00:00
Alberto Gonzalez	e49fdee404	Do not modify design modules while iterating over modules(). ... Co-Authored-By: Eddie Hung <eddie@fpgeh.com>	2020-05-14 20:06:53 +00:00
Alberto Gonzalez	985a29ff3b	Clean up pseudo-private member usage, superfluous std::vector instantiation, and RTLIL::id2cstr() usage in passes/techmap/techmap.cc.	2020-05-14 20:06:53 +00:00
Eddie Hung	02df0198b6	abc9_ops: -prep_hier to create unmap module that removes Q's (* init *)	2020-05-14 10:33:57 -07:00
Eddie Hung	13f9d65b6f	abc9: preserve $_DFF_?_.Q's (* init *); rely on clean to remove it	2020-05-14 10:33:57 -07:00
Eddie Hung	fa31e84112	Fix broken test when ignoring abc9_flop with init == 1'b1	2020-05-14 10:33:57 -07:00
Eddie Hung	97a0a04314	abc9_ops/xaiger: further reducing Module::derive() calls by ... ... replacing _all_ (* abc9_box *) instantiations with their derived types	2020-05-14 10:33:57 -07:00
Eddie Hung	e79127fceb	Cleanup; reduce Module::derive() calls	2020-05-14 10:33:57 -07:00
Eddie Hung	8d34aee3d5	abc9: update to =_$abc9_flops pattern which includes whiteboxes	2020-05-14 10:33:57 -07:00
Eddie Hung	f652a9c11c	abc9_ops: update docs	2020-05-14 10:33:57 -07:00
Eddie Hung	57c478c537	abc9: only do +/abc9_map if `DFF	2020-05-14 10:33:57 -07:00
Eddie Hung	2946bb60e9	abc9: rework submod -- since it won't move (* keep *) cells	2020-05-14 10:33:56 -07:00
Eddie Hung	b65610fb62	abc9_ops: move assert	2020-05-14 10:33:56 -07:00
Eddie Hung	ed7cb0b095	abc9: put 'aigmap' back	2020-05-14 10:33:56 -07:00
Eddie Hung	b3e2538a14	abc9_ops: fix bypass boxes using (* abc9_bypass *)	2020-05-14 10:33:56 -07:00
Eddie Hung	d5a8aaba8c	abc9_ops: tidy up, suppress error if no boxes/holes	2020-05-14 10:33:56 -07:00
Eddie Hung	e2044fd9c7	abc9_ops: -prep_delays to not insert delay box if input connection is const	2020-05-14 10:33:56 -07:00
Eddie Hung	8b5fb99245	abc9_ops: cleanup; -prep_dff -> -prep_dff_submod	2020-05-14 10:33:56 -07:00
Eddie Hung	7cd3f4a79b	abc9_ops: add -prep_bypass for auto bypass boxes; refactor ... Eliminate need for abc9_{,un}map.v in xilinx -prep_dff_{hier,unmap} -> -prep_hier	2020-05-14 10:33:56 -07:00
Eddie Hung	bb840cca9c	abc9_ops: -reintegrate to handle $_FF_; cleanup	2020-05-14 10:33:56 -07:00
Eddie Hung	c50601e35e	abc9: restore selected_modules()	2020-05-14 10:33:56 -07:00
Eddie Hung	48052ad813	abc9: add flop boxes to basic $_DFF_P_ and $_DFF_N_ too	2020-05-14 10:33:56 -07:00
Eddie Hung	4cec21b93e	abc9_ops: -prep_dff_map to error if async flop found	2020-05-14 10:33:56 -07:00
Eddie Hung	c41c180f68	abc9: remove redundant wbflip	2020-05-14 10:33:56 -07:00
Eddie Hung	ec4bbb1444	abc9: generate $abc9_holes design instead of <name>$holes	2020-05-14 10:33:56 -07:00
Eddie Hung	c52bb11fb6	abc9_ops: more robust	2020-05-14 10:33:56 -07:00
Eddie Hung	8d7b3c06b2	abc9: suppress warnings when no compatible + used flop boxes formed	2020-05-14 10:33:56 -07:00
Eddie Hung	fb447951be	abc9: cleanup	2020-05-14 10:33:56 -07:00
Eddie Hung	8bad885e78	abc9_ops: -prep_dff_map to check $_DFF_[NP]_.Q drives module output	2020-05-14 10:33:56 -07:00
Eddie Hung	489e83fc1e	abc9_ops: do away with '$abc9_cells' selection	2020-05-14 10:33:56 -07:00
Eddie Hung	043ad8e76c	abc9_ops: use new 'design -delete' and 'select -unset'	2020-05-14 10:33:56 -07:00
Eddie Hung	e38b1280f9	abc9_ops: -prep_dff_map to warn if no specify cells	2020-05-14 10:33:56 -07:00
Eddie Hung	a1ae5845f8	abc9_ops: -prep_dff_map to cope with plain $_DFF_[NP]_ flops	2020-05-14 10:33:56 -07:00