637 commits

Author	SHA1	Message	Date
Akash Levy	a32e4dd8f8	Revert "Reapply "Add fanoutlimit"" ... This reverts commit 7ebc3ed7d2.	2024-08-27 17:27:23 -07:00
Akash Levy	7ebc3ed7d2	Reapply "Add fanoutlimit" ... This reverts commit 9470dbe806.	2024-08-27 17:23:55 -07:00
Akash Levy	9470dbe806	Revert "Add fanoutlimit" ... This reverts commit be9a4f338d.	2024-08-27 17:22:31 -07:00
Akash Levy	be9a4f338d	Add fanoutlimit	2024-08-27 17:20:29 -07:00
Akash Levy	77868f52ec	Add add/sub/mul to wreduce pass	2024-08-27 14:33:59 -07:00
Akash Levy	6552f131de	wreduce in opt_balance_tree	2024-08-27 14:33:43 -07:00
Akash Levy	4f6a153961	Working tree balance pass	2024-08-27 08:19:17 -07:00
Akash Levy	243d8317a5	SMALL mode with first pass of opt_balance_tree	2024-08-26 22:36:47 -07:00
Akash Levy	0ba088e5ed	Try again	2024-08-21 23:21:00 -07:00
Akash Levy	7f52eb0be8	Update muxpack	2024-08-21 23:00:18 -07:00
Akash Levy	1cc7e5536b	If fully constant don't count as user	2024-08-21 22:30:16 -07:00
Akash Levy	8989f2f98c	Undo fanout_split	2024-08-21 22:20:25 -07:00
Akash Levy	d0529c7eea	muxpack fixes	2024-08-21 21:51:08 -07:00
Akash Levy	8ee8e91ab8	Small edits	2024-08-21 21:40:59 -07:00
Akash Levy	426a9320d9	Small update	2024-08-21 21:38:34 -07:00
Akash Levy	7d44234d80	Try updated muxpack	2024-08-21 21:37:28 -07:00
Akash Levy	a945edc7a0	Smallfix	2024-08-21 20:26:29 -07:00
Akash Levy	283db470be	Small edit	2024-08-21 17:04:08 -07:00
Akash Levy	2e8ee9a44d	Smallclean	2024-08-21 17:03:22 -07:00
Akash Levy	26d9bdb17c	Add more stuff to muxpack	2024-08-21 16:57:28 -07:00
Akash Levy	7345258738	Add shift left to operators that can be size-reduced based on size of output ports	2024-08-14 22:05:47 -07:00
Akash Levy	35c19cb391	Option to include unused bits attribute or not	2024-08-14 22:05:12 -07:00
Akash Levy	55782682de	Iterative muxpack	2024-08-14 05:27:50 -07:00
Akash Levy	36fb6e08c1	Make muxpack faster	2024-08-06 02:26:57 -07:00
Akash Levy	0a997b9e64	muxpack verbosity and -ignore_excl option	2024-07-25 04:40:37 -07:00
Akash Levy	a42f4dbedb	Merge branch 'YosysHQ:main' into master	2024-07-18 00:10:20 -07:00
Emil J	1166238c0f	Merge pull request #4176 from povik/opt_expr-performance ... Improve `opt_expr` performance	2024-07-15 16:10:25 +02:00
Emil J. Tywoniak	532188f239	opt_expr: change info message	2024-07-15 11:14:47 +02:00
Akash Levy	0596766cbd	Merge upstream yosys changes	2024-07-01 18:33:38 -07:00
Catherine	580aaa362d	opt_lut_ins: fix name of global object. NFCI	2024-06-28 15:12:36 +00:00
Emil J. Tywoniak	01f332e750	opt_expr: reduce mostly harmless warning to log	2024-06-25 20:18:49 +02:00
Martin Povišer	fa4a2b6b0d	opt_expr: In clkinv loop ignore irrelevant cells early ... Each call to `handle_clkpol_celltype_swap` has a conversion of the cell's type ID to an allocated string. This can sum up to a non-negligible time being spent in the clkpol code even for a design which doesn't have any flip-flop gates.	2024-06-24 18:32:33 +02:00
Martin Povišer	7a8a69b65c	opt_expr: Revisit sorting in replace_const_cells ... Avoid building a cell-to-inbit map when sorting the cells, add a warning if we are unable to sort, and move the code treating non-combinational cells ahead of the rest (this means we don't need to pass non-combinational cells to the TopoSort object at all).	2024-06-24 18:32:33 +02:00
Akash Levy	fce46d2a53	Add better Yosys/Verific name aliasing and reenable dffe opt	2024-06-15 14:18:33 -07:00
Akash Levy	bfc35122ef	Disable broken dffe pass for now	2024-06-07 10:50:37 -07:00
Akash Levy	4475b50ffa	Undo some ugly stuff and make more attempted fixes	2024-06-02 23:33:23 -07:00
Akash Levy	4e39064b88	Remove annoying neg thing	2024-05-23 21:05:45 -07:00
Akash Levy	187737b86a	Don't adjust naming on imported cells. Add $ for each pass	2024-05-19 15:02:40 -07:00
Akash Levy	6a3bb58d5d	Updates from yosys	2024-04-14 18:53:44 -07:00
Martin Povišer	4a8cdfabbb	Merge pull request #4169 from povik/clean-opt_clean-step2 ... opt_clean: Remove dead assertion	2024-04-13 18:12:40 +02:00
Emil J. Tywoniak	4bb3b099d2	opt_demorgan: fix extra args warning	2024-04-03 10:02:53 +02:00
Martin Povišer	030d639201	opt_mem, memory_*: Refuse to operate in presence of processes ... Processes can contain `MemWriteAction` entries which are invisible to most passes operating on memories but which will be lowered to write ports later on by `proc_memwr`. For that reason we can get corrupted RTLIL if we sequence the memory passes before `proc`. Address that by making the affected memory passes ignore modules with processes.	2024-02-23 12:27:53 +01:00
Miodrag Milanović	edb95c69a9	Merge pull request #4084 from jix/scopeinfo ... $scopeinfo support	2024-02-12 09:51:22 +01:00
Miodrag Milanović	2f4c917dac	Merge pull request #4181 from povik/ci-cxxstd-fix ... ci: Fix CXXSTD typo	2024-02-08 18:55:47 +01:00
Martin Povišer	043f1e2bcb	opt_lut: Remove leftover -dlogic help	2024-02-08 17:49:44 +01:00
Martin Povišer	af1a5cfeb9	Address SigBit/SigSpec confusion issues under c++20	2024-02-08 17:48:36 +01:00
Jannis Harder	bfd9cf63db	Ignore $scopeinfo in opt_merge	2024-02-06 17:51:29 +01:00
Jannis Harder	8902fc94b6	Suport $scopeinfo in flatten and opt_clean	2024-02-06 17:51:29 +01:00
N. Engelhardt	f96e27ac14	Merge pull request #4123 from povik/clean-opt_clean ... opt_clean: Add commentary, remove dead code	2024-02-05 15:08:34 +01:00
Catherine	c7bf0e3b8f	Add new $check cell to represent assertions with a message.	2024-02-01 20:10:39 +01:00