N. Engelhardt
1cf8e7c7db
add ioff inference for qlf_k6n10f
2025-01-24 21:17:15 +01:00
Miodrag Milanovic
6dc62bd013
Fix out of tree build
2023-12-06 09:56:35 +01:00
Martin Povišer
16ea497d7c
pmgen: Have a single make pattern
...
Remove duplicate %.pmg -> %_pm.h pattern. One of the duplicates overrode
the other, and in some conditions there were build races as to whether
the target directory for the generated header would exist. Instead have
a single rule which is properly generalized.
2023-12-05 18:30:13 +01:00
Martin Povišer
e0fc48e196
quicklogic: Generate bram_types_sim.v at build time
2023-12-04 18:21:00 +01:00
N. Engelhardt
f9c8978128
add example memory test
2023-12-04 15:52:03 +01:00
N. Engelhardt
b80b1ab8b6
merge brams_final_map.v into brams_map.v
2023-12-04 15:52:02 +01:00
N. Engelhardt
20d864bbde
add dsp inference
2023-12-04 15:52:02 +01:00
N. Engelhardt
6682693888
change ql-bram-types pass to use mode parameter; clean up primitive libraries
2023-12-04 15:52:02 +01:00
N. Engelhardt
48c1fdc33d
add qlf_k6n10f architecture + bram inference
...
(Copied from QuickLogic Yosys plugin repo)
2023-12-04 15:52:02 +01:00
N. Engelhardt
98769010af
synth_quicklogic: rearrange files to prepare for adding more architectures
2023-12-04 15:52:02 +01:00
Lofty
dce037a62c
quicklogic: ABC9 synthesis
2021-04-17 20:54:58 +02:00
Lofty
f4298b057a
quicklogic: PolarPro 3 support
...
Co-authored-by: Grzegorz Latosiński <glatosinski@antmicro.com>
Co-authored-by: Maciej Kurc <mkurc@antmicro.com>
Co-authored-by: Tarachand Pagarani <tpagarani@quicklogic.com>
Co-authored-by: Lalit Sharma <lsharma@quicklogic.com>
Co-authored-by: kkumar23 <kkumar@quicklogic.com>
2021-03-18 13:28:16 +01:00
