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3839 commits 122 branches 59 tags 72 MiB
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Author SHA1 Message Date
Robert Ou
9763e4d830 Fix infinite loop in abc command under emscripten 2018-05-18 22:42:39 -07:00
Robert Ou
bd87462b47 Fix reading techlibs under emscripten 2018-05-18 22:42:33 -07:00
Robert Ou
93f79299a5 Add options to disable abc's usage of pthreads and readline 2018-05-18 22:42:24 -07:00
Robert Ou
bfce3a7479 Add an option to statically link abc into yosys 
This is currently incomplete because the output filter no longer works.
 2018-05-18 22:35:28 -07:00
Robert Ou
1b210dbfb7 Makefile: Make abc always use stdint.h 2018-05-18 22:26:29 -07:00
Clifford Wolf
177a989e48
Merge pull request #550 from jimparis/yosys-upstream 
Support SystemVerilog `` extension for macros
 2018-05-17 14:10:24 +02:00
Clifford Wolf
c3be94e967
Merge pull request #551 from olofk/ice40_cells_sim_ports 
Avoid mixing module port declaration styles in ice40 cells_sim.v
 2018-05-17 14:03:58 +02:00
Olof Kindgren
faac2c5595 Avoid mixing module port declaration styles in ice40 cells_sim.v 
The current code requires workarounds for several simulators
For modelsim, the file must be compiled with -mixedansiports and
xsim needs --relax.
 2018-05-17 13:54:43 +02:00
Jim Paris
4a229e5b95 Support SystemVerilog `` extension for macros 2018-05-17 00:09:56 -04:00
Jim Paris
872d8d49e9 Skip spaces around macro arguments 2018-05-17 00:06:49 -04:00
Clifford Wolf
a7281930c5 Fix handling of anyconst/anyseq attrs in VHDL code via Verific 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-15 19:27:00 +02:00
Clifford Wolf
4b6c0e331d Remove mercurial from build instructions 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-15 14:19:05 +02:00
Clifford Wolf
fe80b39f56 Fix iopadmap for loops between tristate IO buffers 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-15 14:02:27 +02:00
Clifford Wolf
edd297fb1c Fix iopadmap for cases where IO pins already have buffers on them 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-15 13:13:43 +02:00
Clifford Wolf
0fad1570b5 Some cleanups in setundef.cc 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-13 16:36:12 +02:00
Clifford Wolf
ae33026799 Use $(OS) in makefile to check for Darwin 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-13 13:29:18 +02:00
Clifford Wolf
bab39eacce
Merge pull request #505 from thefallenidealist/FreeBSD_build 
FreeBSD build
 2018-05-13 13:27:14 +02:00
Christian Krämer
c1ecb1b2f1 Add "#ifdef __FreeBSD__" 
(Re-commit e3575a8 with corrected author field)
 2018-05-13 13:08:26 +02:00
Clifford Wolf
1167538d26 Revert "Add "#ifdef __FreeBSD__"" 
This reverts commit e3575a86c5.
 2018-05-13 13:06:36 +02:00
Sergiusz Bazanski
7d076f071e Also interpret '&' in liberty functions 2018-05-12 20:55:31 +02:00
Clifford Wolf
587056447e Add optimization of tristate buffer with constant control input 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-12 15:18:27 +02:00
Clifford Wolf
11406a8082 Add "hierarchy -simcheck" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-12 13:59:13 +02:00
Johnny Sorocil
5b9f73cd91 update README 2018-05-06 18:22:18 +02:00
Johnny Sorocil
0295213bec autotest.sh: Change from /bin/bash to /usr/bin/env bash 
This enables running tests on Unix systems which are not shipped with
bash installed in /bin/bash (eg *BSDs and Solaris).
 2018-05-06 15:26:23 +02:00
Johnny Sorocil
74f2787b10 Enable building on FreeBSD 2018-05-06 15:19:44 +02:00
Clifford Wolf
24e6401617 Further improve handling of zero-length SVA consecutive repetition 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-05 14:32:04 +02:00
Clifford Wolf
3e67497ec2 Fix handling of zero-length SVA consecutive repetition 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-05 13:58:01 +02:00
Johnny Sorocil
e3575a86c5 Add "#ifdef __FreeBSD__" 2018-05-05 13:02:44 +02:00
Clifford Wolf
145c685de0 Add ABC FAQ to "help abc" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-04 21:59:31 +02:00
Clifford Wolf
5c03aeac60 Add "yosys -e regex" for turning warnings into errors 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-04 15:27:28 +02:00
Clifford Wolf
47eb150eec
Merge pull request #537 from mithro/yosys-vpr 
Improving Yosys when used with VPR
 2018-05-04 12:32:30 +02:00
Clifford Wolf
a572b49538 Replace -ignore_redef with -[no]overwrite 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-03 15:25:59 +02:00
Dan Gisselquist
e060375f23 Support more character literals 2018-05-03 12:35:01 +02:00
Clifford Wolf
ea3ff6f59c Update ABC to git rev f23ea8e 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-04-30 19:50:34 +02:00
Clifford Wolf
b4c1d3084f Add "synth_intel --noiopads" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-04-30 13:02:56 +02:00
Clifford Wolf
d9a2b43014 Add $dlatch support to write_verilog 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-04-22 16:03:26 +02:00
Tim 'mithro' Ansell
d6bdefd2e9 Improving vpr output support. 
* Support output BLIF for Xilinx architectures.
 * Support using .names in BLIF for Xilinx architectures.
 * Use the same `NO_LUT` define in both `synth_ice40` and
  `synth_xilinx`.
 2018-04-18 16:55:12 -07:00
Tim 'mithro' Ansell
ca39e493ba synth_ice40: Rework the vpr blif output slightly. 2018-04-18 16:55:08 -07:00
Clifford Wolf
81a457c4a6 Add "synth_ice40 -nodffe" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-04-16 20:44:26 +02:00
Clifford Wolf
5ca91ca019 Add "write_blif -inames -iattr" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-04-15 14:07:21 +02:00
Clifford Wolf
2d7f3123f0 Add statement labels for immediate assertions 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-04-13 11:52:28 +02:00
Clifford Wolf
66ffc99695 Allow "property" in immediate assertions 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-04-12 14:28:28 +02:00
Clifford Wolf
2f0ecff71c Improve Makefile error handling for when abc/ is a hg working copy 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-04-12 14:02:57 +02:00
Clifford Wolf
617c60cea6 Add PRIM_HDL_ASSERTION support to Verific importer 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-04-07 18:38:42 +02:00
Clifford Wolf
0ac768f9df Fix handling of $global_clocking in Verific 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-04-06 21:23:47 +02:00
Clifford Wolf
035f778121 Add documentation for anyconst/anyseq/allconst/allseq attribute 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-04-06 14:37:43 +02:00
Clifford Wolf
5ea2c53604 Add read_verilog anyseq/anyconst/allseq/allconst attribute support 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-04-06 14:35:11 +02:00
Clifford Wolf
278685b084 Add Verific anyseq/anyconst/allseq/allconst attribute support 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-04-06 14:19:55 +02:00
Clifford Wolf
ab8db2c168 Add "verific -autocover" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-04-06 14:10:57 +02:00
Clifford Wolf
f10e0e15c5
Merge pull request #530 from makaimann/set-ram-flags 
Set RAM runtime flags for Verific frontend
 2018-04-06 13:50:23 +02:00