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	Add documentation for anyconst/anyseq/allconst/allseq attribute
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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		|  | @ -402,6 +402,10 @@ Non-standard or SystemVerilog features for formal verification | |||
|   statements it is sufficient if just one ``$allconst/$allseq`` value triggers | ||||
|   the property (similar to ``$anyconst/$anyseq``). | ||||
| 
 | ||||
| - Wires/registers decalred using the ``anyconst/anyseq/allconst/allseq`` attribute | ||||
|   (for example ``(* anyconst *) reg [7:0] foobar;``) will behave as if driven | ||||
|   by a ``$anyconst/$anyseq/$allconst/$allseq`` function. | ||||
| 
 | ||||
| - The SystemVerilog tasks ``$past``, ``$stable``, ``$rose`` and ``$fell`` are | ||||
|   supported in any clocked block. | ||||
| 
 | ||||
|  |  | |||
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