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4 commits

Author SHA1 Message Date
Krystine Sherwin
805f110aef analogdevices: Extra tests 
`mem_gen.py` based on quicklogic tests.
Remove BUFG from `lutram.ys`.
Extra `sync_ram_sp` models in `arch/common/blockram.v`.
Add analogdevices to main makefile tests.
Not all the other tests are passing, but that's fine for now.
 2025-10-18 12:14:03 +01:00
Lofty
059925a56a analogdevices: DSP inference 2025-10-16 23:33:59 +01:00
Krystine Sherwin
55040dc6b1 analogdevices: Update lutram.ys test 2025-10-16 08:43:08 +01:00
Lofty
2cdd97a8d4 test suite 2025-10-16 08:43:08 +01:00