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19212 commits

Author SHA1 Message Date
Miodrag Milanović
693d5a7eb0
Merge pull request #5903 from YosysHQ/krys/verific_memsize
verific: Fix non-contiguous memory flattening producing out of bounds accesses in some cases
2026-06-04 05:43:04 +00:00
Miodrag Milanović
78e05dfb00
Merge pull request #5894 from YosysHQ/gcc_16
Bump CI to gcc-16 and fix warnings
2026-06-03 12:07:45 +00:00
Emil J
136d80e3d7
Merge pull request #5918 from mikesinouye/keywords
verilog backend: runtime optimization for keyword pool
2026-06-03 11:26:20 +00:00
Miodrag Milanovic
4124649b1b Bump CI to use gcc-16 as latest compiler 2026-06-03 13:09:38 +02:00
Miodrag Milanovic
a599999d1f Fixed warnings found by gcc-16 2026-06-03 13:09:38 +02:00
Miodrag Milanović
337df7fc75
Merge pull request #5895 from YosysHQ/cat/cmake
Migrate build system to CMake
2026-06-03 09:31:46 +00:00
Catherine
afc0e78d11 Update top-level Python project for CMake compatibility.
This commit reimplements the (no longer recommended) setuptools based
build system using a standards-based in-tree PEP517 build backend.
The implementation is partially based on
  https://codeberg.org/ziglang/zig-pypi/src/branch/main/make_wheels.py
which is licensed under BSD-0-clause.

It also adds a new option `YOSYS_BUILD_PYTHON_ONLY` that is available
only if the binary or the library aren't going to be installed, which
turns off these targets entirely, as well as some dependent ones
(e.g. tests).

Co-authored-by: Mohamed Gaber <me@donn.website>
2026-06-03 09:03:23 +00:00
Catherine
780588f28c Drop YOSYS_ENABLE_HELP_SOURCE since C++20 is required. 2026-06-03 08:58:11 +00:00
Catherine
0d15cb55bf Fix Windows portability issues that break MSVC build. 2026-06-03 08:58:11 +00:00
Miodrag Milanovic
ce280354cf Update CI scripts for CMake
Co-authored-by: Catherine <whitequark@whitequark.org>
2026-06-03 08:58:11 +00:00
Catherine
a727e7f6e7 Migrate build system to CMake
See #5895 for details.

This commit does not include CI or documentation changes.
2026-06-03 08:58:10 +00:00
Akash Levy
3cfe3ead82
Merge pull request #181 from Silimate/annotate_ff_width
[ENG-2097] Small fix for annotate_ff_width
2026-06-02 17:45:33 -07:00
Stan Lee
09b2bdfb27 better comment 2026-06-02 15:45:52 -07:00
Stan Lee
96ee0f6ec5 Merge branch 'main' of github.com:silimate/yosys into annotate_ff_width 2026-06-02 15:20:18 -07:00
Stan Lee
6b7e5e2685 update annotate_ff_width pass 2026-06-02 15:17:55 -07:00
Catherine
bcc736ed7d Revert "Putting back some Makefile.conf"
This reverts commit d8587f44f0.
2026-06-02 15:01:50 +00:00
Akash Levy
6a5aecf84a
Merge pull request #180 from Silimate/opt_argmax
opt_argmax pass
2026-06-02 04:25:16 -07:00
Akash Levy
b3ea5770cd opt_argmax pass 2026-06-02 04:11:17 -07:00
Akash Levy
c7b2c16405
Merge pull request #179 from Silimate/opt_compact_prefix
Add opt_compact_prefix pass
2026-06-02 02:14:37 -07:00
Akash Levy
24b75b65db Fix UB issue 2026-06-02 01:18:29 -07:00
Akash Levy
950cdf925c
Update passes/silimate/opt_compact_prefix.cc
Co-authored-by: greptile-apps[bot] <165735046+greptile-apps[bot]@users.noreply.github.com>
2026-06-02 01:15:18 -07:00
nella
8125af88d6
Merge pull request #5921 from phsauter/peepopt-shiftpow2
peepopt: add shiftpow2 pattern
2026-06-02 08:07:03 +00:00
Akash Levy
e03c54c695
Merge pull request #178 from Silimate/opt_balance_tree_improve1
Improvement to opt_balance_tree
2026-06-02 01:03:20 -07:00
Akash Levy
4f57472783
Merge pull request #176 from Silimate/annotate_ff_width
[ENG-2090] Added annotate_ff_width pass + modifications for support in clockgate
2026-06-02 00:55:38 -07:00
Akash Levy
a730032f5f Add opt_compact_prefix pass 2026-06-01 23:00:33 -07:00
Stan Lee
3d8f4999d6 selected cells and modules 2026-06-01 19:20:47 -07:00
Akash Levy
0c3446e8af Fixups for Greptile 2026-06-01 19:03:52 -07:00
Akash Levy
9cc69a3c49 Improvement to opt_balance_tree 2026-06-01 17:56:44 -07:00
Stan Lee
1b707c61f7 necessary clock gate pass modifications 2026-06-01 17:19:23 -07:00
Stan Lee
483b1536d7 update pass 2026-06-01 17:10:18 -07:00
Stan Lee
e3134c6692 annotate_ff_width pass 2026-06-01 16:35:30 -07:00
Miodrag Milanović
7d3819c6bb
Merge pull request #5923 from YosysHQ/release/v0.66
Release version 0.66
2026-06-01 16:58:38 +00:00
Miodrag Milanovic
8bb194af22 Next dev cycle 2026-06-01 18:23:28 +02:00
Miodrag Milanovic
86f2ddebce Release version 0.66 2026-06-01 17:01:26 +02:00
Miodrag Milanović
2105caa844
Merge pull request #5922 from YosysHQ/wheels_fix
Fix wheels
2026-06-01 09:19:13 +00:00
Miodrag Milanovic
904151acd8 Fix wheels 2026-06-01 09:59:04 +02:00
Philippe Sauter
c89cfe1e6e peepopt: add shiftpow2 pattern
Rewrite power-of-two indexed word selects to $bmux when the shift
amount already carries the scale as low zero bits.

Keep the rule to non-overlapping selections and bound the generated
mux ways. Add regressions for aligned shifts, padding, signed
extension, and shiftmul handoff cases.
2026-05-31 02:01:32 +02:00
Krystine Sherwin
0360a4bd0a
tests/check_mem: Drop unused init check
It was also raising an error in `read_verilog`.
2026-05-30 11:06:11 +12:00
Mike Inouye
a14650d07b verilog backend: runtime optimization for keyword pool
Signed-off-by: Mike Inouye <mikeinouye@google.com>
2026-05-29 17:53:31 +00:00
Miodrag Milanović
e56c6a954c
Merge pull request #5915 from YosysHQ/emil/auto-lifetime-hotfix-nosync
genrtlil: don't avoid emitting flops for nosync
2026-05-29 14:08:45 +00:00
Miodrag Milanović
b85777a6e6
Merge pull request #5914 from pu-cc/gatemate-scopename
gatemate: add option to create 'scopename' attributes when flattening netlist
2026-05-29 10:31:04 +00:00
Emil J. Tywoniak
80bdbaa010 genrtlil: don't avoid emitting flops for nosync 2026-05-29 11:37:08 +02:00
Krystine Sherwin
5f53410db7
verific: Fix negative array dimensions
Recurse over memory dimensions once, doing both our min/max address checking and parsing out the initval.  This also avoids problems with negative numbers (if `a < b` and one or both are negative, `a` might be the intended `max_addr_chunk`).
Fix sub addressing, where we use some but not all of the current dimension's bits.
2026-05-29 18:40:25 +12:00
Krystine Sherwin
52e0030cc5
tests/check_mem: Add problematic case
Verific reports it as 16 2-bit addresses, meaning we have to iterate over the last dimension while skipping indices.
2026-05-29 18:40:25 +12:00
Krystine Sherwin
21966ef496
verific: Fix non-contiguous memory init
Recurse over nested type ranges to calculate true addresses.
2026-05-29 18:40:25 +12:00
Krystine Sherwin
ab5f25db9a
Add test for non-contiguous memory init
Also negative memory addresses.
2026-05-29 18:40:24 +12:00
Krystine Sherwin
aac7366862
tests: Add check_mem to vanilla-test 2026-05-29 18:40:24 +12:00
Krystine Sherwin
f6327cc444
check_mem: Add -non-const option
Can identify potentially dangerous addressing, but also prone to false-positives.
2026-05-29 18:40:24 +12:00
Krystine Sherwin
099c664dc9
verific: Fix upto ranges 2026-05-29 18:40:23 +12:00
Krystine Sherwin
7cf0c55466
verific: Fix non-contiguous memory flattening
May not be the best approach, insofar as it uses empty memory elements for padding out the alignment, but it does avoid costly address arithmetic.
Still needs to adjust ascii init val addresses, but should work fine for read/write accesses.
2026-05-29 18:40:23 +12:00