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Code Activity
12940 commits 122 branches 59 tags 72 MiB
Commit graph

882 commits

Author SHA1 Message Date
Eddie Hung
d0b202c58d Add no MULT no DPORT config 2019-09-13 12:05:14 -07:00
Eddie Hung
247a63f55d Add support for MULT and DPORT 2019-09-13 11:45:55 -07:00
Eddie Hung
e235dd0785 Refine diagram 2019-09-13 09:34:40 -07:00
Eddie Hung
734034a872 Add an ASCII drawing 2019-09-12 18:13:46 -07:00
Eddie Hung
c52863f147 Finish explanation 2019-09-12 18:01:49 -07:00
Eddie Hung
aaeaab4ac0 Rename to techmap_guard 2019-09-12 17:45:02 -07:00
Eddie Hung
6bb8e6a726 Initial DSP48E1 box support 2019-09-12 17:11:01 -07:00
Eddie Hung
3a39073302 Set more ports explicitly 2019-09-12 17:10:43 -07:00
Eddie Hung
0ebbecf833 Missing space 2019-09-11 13:06:59 -07:00
Eddie Hung
feb3fa65a3 Merge remote-tracking branch 'origin/master' into xc7dsp 2019-09-11 00:01:31 -07:00
Eddie Hung
5c1271c51c Move "(skip if -nodsp)" message to label 2019-09-10 15:26:56 -07:00
Eddie Hung
76eedee089 Really get rid of 'opt_expr -fine' by being explicit 2019-09-10 14:26:12 -07:00
Eddie Hung
c460d10e60 Remove wreduce call 2019-09-10 14:17:35 -07:00
Eddie Hung
f3a55d3f06 Add comment for why opt_expr is necessary 2019-09-10 14:11:56 -07:00
Eddie Hung
8514e7c32e Revert "Remove "opt_expr -fine" call" 
This reverts commit bfda921d03.
 2019-09-10 14:09:21 -07:00
Eddie Hung
d3fb308181 Rename label to map_dsp 2019-09-10 13:18:10 -07:00
Eddie Hung
bfda921d03 Remove "opt_expr -fine" call 2019-09-10 13:17:47 -07:00
Eddie Hung
a7e6032287 Set USE_MULT and USE_SIMD 2019-09-09 20:56:29 -07:00
Marcin Kościelnicki
fda94311ee synth_xilinx: Support init values on Spartan 6 flip-flops properly. 2019-09-07 16:30:43 +02:00
Eddie Hung
e742478e1d Merge remote-tracking branch 'origin/master' into xc7dsp 2019-09-05 13:01:27 -07:00
Eddie Hung
aa1491add3 Resolve TODO with pin assignments for SRL* 2019-09-04 15:47:36 -07:00
Eddie Hung
3459d28349 Add comments 2019-09-02 12:22:15 -07:00
Eddie Hung
f33abd4eab Remove trailing space 2019-08-30 16:44:11 -07:00
Eddie Hung
723815b384 Merge remote-tracking branch 'origin/master' into xc7dsp 2019-08-30 13:26:19 -07:00
Eddie Hung
295c18bd6b Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dsp 2019-08-30 09:50:20 -07:00
Eddie Hung
6e475484b2 Merge remote-tracking branch 'origin/master' into eddie/xilinx_srl 2019-08-30 09:37:32 -07:00
David Shah
6919c0f9b0 Merge branch 'master' into xc7dsp 2019-08-30 13:57:15 +01:00
Eddie Hung
1b08f861b6 Merge branch 'eddie/xilinx_srl' into xaig_arrival 2019-08-28 15:31:48 -07:00
Eddie Hung
8d820a9884 Merge remote-tracking branch 'origin/master' into xaig_arrival 2019-08-28 15:19:10 -07:00
Eddie Hung
9314a0a42e Add (* clkbuf_sink *) to SRLC16E, reorder ports to match vendor 2019-08-28 10:51:39 -07:00
Eddie Hung
ba5d81c7f1 Merge remote-tracking branch 'origin/master' into eddie/xilinx_srl 2019-08-28 09:21:03 -07:00
Marcin Kościelnicki
d361f5ab79 xilinx: Add SRLC16E primitive. 
Fixes #1331.
 2019-08-27 20:27:12 +02:00
Eddie Hung
1ba09c4ab7 Merge branch 'master' into eddie/xilinx_srl 2019-08-26 13:56:31 -07:00
Eddie Hung
a098205479 Merge branch 'master' into mwk/xilinx_bufgmap 2019-08-26 13:25:17 -07:00
Eddie Hung
d7051b90de Add undocumented feature 2019-08-23 16:41:32 -07:00
Eddie Hung
08139aa53a xilinx_srl now copes with word-level flops $dff{,e} 2019-08-23 12:22:46 -07:00
Eddie Hung
78b7d8f531 Merge remote-tracking branch 'origin/master' into eddie/xilinx_srl 2019-08-23 11:32:44 -07:00
Eddie Hung
e658d472c8 Put attributes above port 2019-08-23 11:31:20 -07:00
Eddie Hung
d672b1ddec Merge remote-tracking branch 'origin/master' into xaig_arrival 2019-08-23 11:26:55 -07:00
Eddie Hung
20f4d191b5 Merge branch 'master' into mwk/xilinx_bufgmap 2019-08-23 11:24:19 -07:00
Eddie Hung
509c353fe9 Forgot one 2019-08-23 11:23:50 -07:00
Eddie Hung
0d0ad15898 Merge branch 'master' into mwk/xilinx_bufgmap 2019-08-23 11:23:31 -07:00
Eddie Hung
a270af00cc Put abc_* attributes above port 2019-08-23 11:21:44 -07:00
Eddie Hung
6872805a3e Merge remote-tracking branch 'origin/master' into mwk/xilinx_bufgmap 2019-08-23 10:00:50 -07:00
Eddie Hung
15188033da Add variable length support to xilinx_srl 2019-08-21 17:34:40 -07:00
Eddie Hung
edec73fec1 abc9 to perform new 'map_ffs' before 'map_luts' 2019-08-21 15:37:55 -07:00
Eddie Hung
5ce0c31d0e Add init support 2019-08-21 13:05:10 -07:00
Eddie Hung
c7af71ecde Use semicolon 2019-08-21 11:47:17 -07:00
Eddie Hung
5d0f6cbd54 techmap before read 2019-08-21 11:47:06 -07:00
Eddie Hung
584c680691 Add abc_arrival to SRL* 2019-08-21 11:27:42 -07:00