2442 commits

Author	SHA1	Message	Date
Miodrag Milanovic	dc16bdd85b	DFF reset and context must be in sync	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	cb45f8b69d	Fixed of mapping and initialization	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	198fc963ca	Add new DFF types, and added "-nodffe" option	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	0c4bbf7e4b	Fix existing DFF mapping and add new types	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	94675a5e0b	Fix dff simulation model	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	606439b44c	do not leave NX_RAM empty to prevent removing it	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	4cb8e62626	Properly map ff ram	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	1591d258a9	Made NX_CY model more robust	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	dac4f04460	add latch mapping, and remove aldff for now	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	cf21b48bfd	fix co on nx_cy	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	31f943513b	set add_carry property and all inputs to 0	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	b6f7383736	break long chains	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	ab32dde81b	optimized	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	da6a62f3a0	Initial carry chain handling pass	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	474ed28aee	added no-rw-check, and new rfb models	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	a5bfb23b47	start cleaning rams	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	370517b1e6	IO	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	fa14c600ff	commented remainder of primitives	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	8023f921e3	RAM	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	b202126c76	IOM	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	71f0984dc9	fixes	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	ef15325dce	removed virtual primitive	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	f836de6bcc	mark DSPs as TODOs for now	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	8f42d6dace	fifo	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	012f0e2952	memory blocks	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	3ed5ea24b2	sortout more blackboxes	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	0ecc2e597f	PLLs	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	200e1a7bfe	more DSP wrappers	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	ce635abc21	NX_DSP/SPLIT	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	60611b936b	CDC_U	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	815622f685	CDC_L wrappers	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	827ea11503	start splitting blackboxes and add wrapper techmap	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	cfce7dd2f8	remove soc	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	9700971a8a	just copy LOC	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	989eef29b2	produce less cells	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	74289b7339	remove init from sdff	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	4c1f84a686	add io mapping	2024-08-15 17:50:36 +02:00
Lofty	b0c4add642	Added lutram	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	5d898ab223	Add blackboxes	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	8374f0336d	add family and ability to disable carry chains	2024-08-15 17:50:36 +02:00
Lofty	b3f59c9820	Add NX_CY	2024-08-15 17:50:36 +02:00
Lofty	b4e9bb0d85	Add FFs and related tests	2024-08-15 17:50:36 +02:00
Miodrag Milanovic	94b6f19cf0	Make lut init match vendor tools	2024-08-15 17:50:36 +02:00
Lofty	3b48e9df61	Add initial NanoXplore pass	2024-08-15 17:50:36 +02:00
N. Engelhardt	9f869b265c	Merge pull request #4474 from tony-min-1/mchp ... Add PolarFire FPGA support	2024-07-29 15:28:44 +02:00
Emil J	43c1328fbb	Merge pull request #4479 from yrabbit/z1-power ... Gowin. Add an energy saving primitive	2024-07-18 11:56:00 +02:00
YRabbit	19bbdd8800	Gowin. Add the DCS primitive ... Not so much adding the primitive itself, but only its DCS_MODE parameter, without which an error occurs. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>	2024-07-11 21:39:44 +10:00
chunlin min	3db69b7a10	inline all tests. Add switch to remove init values as PolarFire DFFs do not support init	2024-07-08 17:03:03 -04:00
chunlin min	0afb5e28fb	cosmetic changes	2024-07-08 15:10:44 -04:00
chunlin min	af67c745c4	initialize argidx to 1	2024-07-08 11:41:41 -04:00