917 commits

Author	SHA1	Message	Date
Clifford Wolf	0dc249ccd7	Shrinked the copyright banner by 1 character	2014-10-11 11:59:35 +02:00
Clifford Wolf	8263f6a74a	Fixed win32 troubles with f.readsome()	2014-10-11 11:36:22 +02:00
Clifford Wolf	568fee5e74	Added proc_self_dirname() for win32	2014-10-11 11:08:52 +02:00
Clifford Wolf	53349fb634	Fixed ifdefs for plugin unloading	2014-10-11 10:57:46 +02:00
Clifford Wolf	df537a216b	Using next_token() to parse commands	2014-10-10 18:53:03 +02:00
Clifford Wolf	20d85f20db	Fixed next_token()	2014-10-10 18:38:40 +02:00
Clifford Wolf	2c683102be	Added next_token() function (strtok() replacement)	2014-10-10 18:33:55 +02:00
Clifford Wolf	986bcc13cb	Various win32 build fixes in yosys.cc	2014-10-10 18:20:17 +02:00
Clifford Wolf	ee5165c6e4	Moved patmatch() to yosys.cc	2014-10-10 18:20:17 +02:00
Clifford Wolf	774933a0d8	Replaced fnmatch() with patmatch()	2014-10-10 18:02:17 +02:00
Clifford Wolf	bbd808072b	Added format __attribute__ to stringf()	2014-10-10 17:22:08 +02:00
Clifford Wolf	7cb0d3aa1a	Renamed TRUE/FALSE to CONST_TRUE/CONST_FALSE because of name collision on Win32	2014-10-10 17:07:24 +02:00
Clifford Wolf	4569a747f8	Renamed SIZE() to GetSize() because of name collision on Win32	2014-10-10 17:07:24 +02:00
Clifford Wolf	c7f5aab625	Replaced "#ifdef WIN32" with "#ifdef _WIN32"	2014-10-09 17:00:54 +02:00
Clifford Wolf	fea11f0fa4	Added API for generic cell cost calculations	2014-10-09 13:59:26 +02:00
Clifford Wolf	d3405c15bf	No rusage on win32	2014-10-09 10:51:24 +02:00
Clifford Wolf	56c1d43408	satgen import sigbit api	2014-10-03 18:51:50 +02:00
Clifford Wolf	3e4b0cac8d	added resource sharing of $macc cells	2014-10-03 12:58:40 +02:00
Clifford Wolf	c3e779a65f	Added $_BUF_ cell type	2014-10-03 10:12:28 +02:00
Clifford Wolf	0b8cfbc6fd	Added support for "keep" on modules	2014-09-29 12:51:54 +02:00
Clifford Wolf	f9a307a50b	namespace Yosys	2014-09-27 16:17:53 +02:00
Clifford Wolf	edf11c635a	Assert on new logic loops in "share" pass	2014-09-21 12:57:33 +02:00
Clifford Wolf	00964f2f61	Initialize RTLIL::Const from std::vector<bool>	2014-09-19 15:50:55 +02:00
Clifford Wolf	fa96cf4a16	Added new CodingReadme file (replaces CodingStyle and CHECKLISTS)	2014-09-16 11:26:44 +02:00
Clifford Wolf	b470c480e9	Added the obvious optimizations to alumacc $macc generator	2014-09-15 12:22:03 +02:00
Clifford Wolf	2442eb3832	Fixed monitor notifications for removed cell	2014-09-14 17:04:39 +02:00
Clifford Wolf	7815f81c32	Added "synth" command	2014-09-14 16:09:06 +02:00
Clifford Wolf	fcb46138ce	Simplified $fa undef model	2014-09-08 16:59:39 +02:00
Clifford Wolf	af0c8873bb	Added $lcu cell type	2014-09-08 13:31:04 +02:00
Clifford Wolf	d46bac3305	Added "$fa" cell type	2014-09-08 12:15:39 +02:00
Clifford Wolf	98e6463ca7	Added $macc eval model	2014-09-06 19:44:28 +02:00
Clifford Wolf	fa64942018	Added $macc SAT model	2014-09-06 19:44:11 +02:00
Clifford Wolf	b847ec8a0b	Added $macc cell type	2014-09-06 15:47:46 +02:00
Ruben Undheim	79cbf9067c	Corrected spelling mistakes found by lintian	2014-09-06 08:47:06 +02:00
Clifford Wolf	8927aa6148	Removed $bu0 cell type	2014-09-04 02:07:52 +02:00
Clifford Wolf	b9cb483f3e	Using $pos models for $bu0	2014-09-03 21:20:59 +02:00
Clifford Wolf	50ac284823	Fixes in $alu SAT- and eval-models	2014-09-03 13:39:46 +02:00
Clifford Wolf	da360771a1	Create a default selection stack in RTLIL::Design::Design()	2014-09-02 22:49:24 +02:00
Clifford Wolf	c38283dbd0	Small bug fixes in $not, $neg, and $shiftx models	2014-09-02 17:48:41 +02:00
Clifford Wolf	2fcf66b91d	Added ConstEval model for $alu cells	2014-09-01 16:35:46 +02:00
Clifford Wolf	bae09dca2b	Added SAT model for $alu cells	2014-09-01 16:35:25 +02:00
Clifford Wolf	e07698818d	Using std::vector<RTLIL::State> instead of RTLIL::Const for RTLIL::SigChunk::data	2014-09-01 11:36:02 +02:00
Clifford Wolf	83ec3fa204	Fixed return size of const_*() eval functions	2014-08-31 18:08:26 +02:00
Clifford Wolf	be44157c0f	Added RTLIL::Const::size()	2014-08-31 18:07:48 +02:00
Clifford Wolf	a1c7d4a8e2	Added eval model for $lut cells	2014-08-31 17:43:31 +02:00
Clifford Wolf	0b6769af3f	Typo fixes in cell->*Param() API	2014-08-31 17:43:31 +02:00
Clifford Wolf	8649b57b6f	Added $lut support in test_cell, techmap, satgen	2014-08-31 17:43:31 +02:00
Clifford Wolf	2a1b08aeb3	Added design->scratchpad	2014-08-30 19:37:12 +02:00
Clifford Wolf	4724d94fbc	Added $alu cell type	2014-08-30 18:59:05 +02:00
Clifford Wolf	dfbd7dd15a	Fixed module->addPmux()	2014-08-30 18:17:22 +02:00