Krystine Sherwin
55040dc6b1
analogdevices: Update lutram.ys test
2025-10-16 08:43:08 +01:00
Krystine Sherwin
18a4e44b28
analogdevices: Native LUTRAM primitives
2025-10-16 08:43:08 +01:00
Lofty
b3e3614c96
analogdevices: LUTRAM config
2025-10-16 08:43:08 +01:00
Lofty
0bec90930f
analogdevices: update timing model
2025-10-16 08:43:08 +01:00
Lofty
9c8a563305
I thought I removed this...
2025-10-16 08:43:08 +01:00
Lofty
b8254b96c7
analogdevices: user retargeting
2025-10-16 08:43:08 +01:00
Lofty
799a4e4291
analogdevices: more housekeeping
2025-10-16 08:43:08 +01:00
Lofty
c7580131ad
analogdevices: remove some extra cells!
2025-10-16 08:43:08 +01:00
Lofty
2cdd97a8d4
test suite
2025-10-16 08:43:08 +01:00
Lofty
04fd4d4601
synth_analogdevices: remove scopeinfo cells
2025-10-16 08:43:08 +01:00
Lofty
7878a7e2bd
Create synth_analogdevices
2025-10-16 08:43:08 +01:00
Miodrag Milanovic
db8c1878a0
fix dlopen using fs:path with mingw
2025-10-16 08:30:43 +02:00
github-actions[bot]
061b6ce2ad
Bump version
2025-10-16 00:23:57 +00:00
Miodrag Milanović
759996b968
Merge pull request #5427 from donn/plugin_search_paths
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plugins: add search paths
2025-10-15 20:02:05 +02:00
Emil J
9d21585a4c
Merge pull request #5426 from rocallahan/parse-sigspec
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Don't stop parsing sigspec after a {} group.
2025-10-15 17:31:11 +02:00
Mohamed Gaber
dce70abd94
plugins: support Windows path delimiters
2025-10-15 15:53:44 +03:00
Mohamed Gaber
e86797f029
plugins: add search path
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This uses the environment variable `YOSYS_PLUGIN_PATH` to provide multiple colon-delimited search paths for native plugins in a similar manner to `PATH` for executables and `PYTHONPATH` for Python modules.
This addresses https://github.com/YosysHQ/yosys/issues/2545 , allowing Yosys to be better packaged in non-FHS environments such as Nix.
2025-10-15 14:13:25 +03:00
github-actions[bot]
4970ad5a18
Bump version
2025-10-15 00:23:49 +00:00
Robert O'Callahan
e099a7d34a
Don't stop parsing sigspec after a {} group.
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Resolves #5424
2025-10-14 21:18:58 +00:00
Miodrag Milanović
2e3bfca294
Merge pull request #5419 from YosysHQ/micko/verific_fix_nocolumns
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verific: Fix error compiling without VERIFIC_LINEFILE_INCLUDES_COLUMNS
2025-10-14 17:05:31 +02:00
Miodrag Milanović
a89c5b97d8
Merge pull request #5423 from YosysHQ/update_abc
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Update abc
2025-10-14 17:05:13 +02:00
Emil J
a5960ce515
Merge pull request #5197 from YosysHQ/emil/opensta-verilog-export
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OpenSTA verilog compatibility
2025-10-14 16:46:37 +02:00
Miodrag Milanovic
7d2857b30f
Fix regex checks
2025-10-14 16:04:56 +02:00
N. Engelhardt
4513783a02
add tests
2025-10-14 15:48:16 +02:00
Emil J. Tywoniak
e9aedf505c
chtype: replace publish pass with chtype -publish_icells
2025-10-14 15:01:48 +02:00
Miodrag Milanovic
d92cf2f5b0
Compile abc when submodule updates
2025-10-14 14:54:56 +02:00
Miodrag Milanovic
d3d3a9f1ea
Update ABC
2025-10-14 14:47:17 +02:00
Emil J
109abd3224
Merge pull request #5421 from YosysHQ/emil/sort-pass
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sort: init
2025-10-14 10:51:25 +02:00
github-actions[bot]
25f2a88770
Bump version
2025-10-14 00:22:29 +00:00
Emil J. Tywoniak
e5edd2acdb
sort: init
2025-10-13 17:32:26 +02:00
Emil J
71eadc9ab5
Merge pull request #5418 from yrabbit/gw5-dff-and-memory
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Gowin. Reduce the range of flip-flop types.
2025-10-13 17:26:56 +02:00
Emil J. Tywoniak
c46df9ffdc
box_derive: rename -apply to -apply_derived_type
2025-10-13 17:24:32 +02:00
Emil J. Tywoniak
d7cea2c35c
box_derive: add -apply
2025-10-13 17:24:32 +02:00
Emil J. Tywoniak
7d8f92e198
publish: add pass for renaming private cell types to public
2025-10-13 17:24:32 +02:00
Jannis Harder
84b5ec856e
Merge pull request #4320 from YosysHQ/ywb_asserts
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write_btor: Include `$assert` and `$assume` cells in -ywmap output
2025-10-13 15:30:11 +02:00
Miodrag Milanovic
1f11b2c529
verific: Add src to message missed in #5406
2025-10-13 15:16:17 +02:00
Miodrag Milanovic
dc959cdf4a
verific: Fix error compiling without VERIFIC_LINEFILE_INCLUDES_COLUMNS
2025-10-13 15:16:17 +02:00
Miodrag Milanovic
9570b39519
verifix: fix bits() deprecation warnings
2025-10-13 09:57:22 +02:00
Miodrag Milanovic
2f8f421dee
verifix: fix bits() deprecation warnings
2025-10-13 09:47:18 +02:00
YRabbit
02e40e8118
Gowin. Reduce the range of flip-flop types.
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UG303-1.0E_Arora Ⅴ Configurable Function Unit (CFU) User Guide.pdf
specifies that the only flip-flop types supported in GW5 are DFFSE,
DFFRE, DFFPE, and DFFCE.
However, the bit streams generated by the vendor IDE also contain DFF
flip-flops, which are probably the result of optimisation, so we leave
them in the list of permitted items, but add a flag that will allow the
generation of completely correct output files, acceptable for further P&
R using vendor tools (they will not allow the use of flip-flops other
than the four specified in the netlist).
In the GW5 SemiDual Port BSRAM series, the primitive does not have
RESETA and RESETB ports—they are replaced by the RESET port, so we
separate the files for BSRAM generation, especially since in the future
we may have to take into account other, as yet unexplored, differences
in BSRAM.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2025-10-11 21:12:35 +10:00
Emil J
9a12d92551
Merge pull request #5386 from YosysHQ/emil/liberty-glob-all
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Expand wildcards in Liberty file consumers
2025-10-09 20:21:48 +02:00
Krystine Sherwin
1a0b5d8ea7
write_btor: Include $assert and $assume cells in -ywmap output
2025-10-09 14:50:36 +02:00
github-actions[bot]
89f32a415b
Bump version
2025-10-09 00:22:39 +00:00
Emil J
a80462f27f
Merge pull request #5339 from rocallahan/fast-rtlil-parser
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Rewrite the RTLIL parser for efficiency
2025-10-08 14:52:37 +02:00
Miodrag Milanović
b7a72811cc
Merge pull request #5408 from rocallahan/atomic-mfp
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Make `mfp` const methods thread-safe.
2025-10-08 13:08:16 +02:00
Miodrag Milanović
ba1a347d59
Merge pull request #5370 from donn/pyosys_pybind11
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pyosys: rewrite using pybind11
2025-10-08 13:07:59 +02:00
Miodrag Milanović
869910055f
Merge pull request #3908 from YosysHQ/ecp5_2_lattice
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synth_ecp5 and synth_nexus to synth_lattice
2025-10-08 13:07:33 +02:00
Miodrag Milanović
4cdaac003f
Merge pull request #3991 from adrianparvino/alumacc-sign
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alumacc: merge independent of sign
2025-10-08 13:02:10 +02:00
Miodrag Milanovic
1d2d777678
Next dev cycle
2025-10-08 09:25:33 +02:00
Miodrag Milanovic
157aabb583
Release version 0.58
2025-10-08 07:51:14 +02:00
