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Code Activity
12586 commits 122 branches 59 tags 72 MiB
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Author SHA1 Message Date
Emil J. Tywoniak
4c0380aa5d bufnorm: my comments 2024-06-03 20:43:02 +02:00
Claire Xenia Wolf
f1038f20f6 Add RTLIL "buffered-normalized mode" and improve "bufnorm" pass 
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
 2023-09-29 15:49:15 +02:00
Claire Xenia Wolf
20194441ff Improvements in "bufnorm" pass 
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
 2023-09-29 10:03:36 +02:00
Claire Xenia Wolf
4d00e088ac Improvements in "bufnorm" pass 
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
 2023-09-29 07:04:22 +02:00
Claire Xenia Wolf
910947dfef Add coarse-grain $buf buffer cell type 
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
 2023-09-29 07:03:23 +02:00
Claire Xenia Wolf
9f70830311 Improvements in "bufnorm" pass 
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
 2023-09-28 20:42:07 +02:00
Claire Xenia Wolf
5b0d224b68 Improvements and fixes to "bufnorm" cmd 
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
 2023-09-27 19:27:08 +02:00
Claire Xenia Wolf
5699244091 Add bufnorm pass 
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
 2023-09-27 18:59:53 +02:00
Martin Povišer
d510a5fcde
Merge pull request #3955 from nakengelhardt/nak/show_use_dot_for_aliases 
show: use dot for wire aliases instead of BUF
 2023-09-27 11:25:19 +02:00
github-actions[bot]
076c5ceb71 Bump version 2023-09-27 00:15:07 +00:00
Wanda
c172fef01a hashlib: Use a better hash for pool. 2023-09-26 18:55:06 +01:00
N. Engelhardt
3319fdc46e show: use dot for wire aliases instead of BUF 2023-09-25 17:20:16 +02:00
github-actions[bot]
934c82254d Bump version 2023-09-22 00:14:51 +00:00
Rasmus Munk Larsen
9ed38bf9b6
Speed up the autoname pass by 3x. (#3945) 
* Speed up the autoname pass by 2x. This is accomplished by only constructing IdString objects for plain strings that have a higher score.

* Defer creating IdStrings even further. This increases the speedup to 3x.
 2023-09-21 09:46:49 +00:00
Ethan Mahintorabi
aa06809d64 rtlil: Speeds up Yosys by 17% 
This PR speeds up by roughly 17% across a wide spectrum of designs
tested at Google. Particularly for the mux generation pass.

Co-authored-by: Rasmus Larsen <rmlarsen@google.com>
Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
 2023-09-21 10:46:11 +01:00
Martin Povišer
c4762d930e
Merge pull request #3930 from povik/verific-test-memsemantics 
verific: Add test of accurate semantics in memory inference
 2023-09-20 11:46:42 +02:00
Martin Povišer
99a5773911
Merge pull request #3920 from zachjs/asgn-expr 
sv: support assignments within expressions
 2023-09-20 11:30:14 +02:00
github-actions[bot]
35a05686c4 Bump version 2023-09-20 00:15:04 +00:00
Miodrag Milanović
8fb807cd24
Merge pull request #3943 from YosysHQ/verific_lineinfo 
Set src attribute for verific with full info
 2023-09-19 12:55:43 +02:00
Miodrag Milanovic
18855f23ce Set src attribute for verific with full info 2023-09-19 12:00:10 +02:00
Zachary Snow
28e99f2b8c fix width of post-increment/decrement expressions 2023-09-18 23:46:06 -04:00
Zachary Snow
7d07615dee allow attributes in front of ++/-- statements 2023-09-18 23:46:02 -04:00
github-actions[bot]
e2b613355d Bump version 2023-09-19 00:23:00 +00:00
Martin Povišer
54be4aca90
Merge pull request #3924 from andyfox-rushc/master 
multpass -- create Booth Encoded multipliers for
 2023-09-18 16:46:59 +02:00
Martin Povišer
8222121164 verific: Add test of accurate semantics in memory inference 2023-09-18 16:37:15 +02:00
N. Engelhardt
6dc7cc3a0e
Merge pull request #3933 from timkpaine/tkp/kernelheaders 2023-09-18 16:29:51 +02:00
N. Engelhardt
39dc2c0725
Merge pull request #3925 from povik/ci-glibcxx-assertions 2023-09-18 16:11:04 +02:00
Tim Paine
9042124ba7 Alphabetize headers to be installed, include some missing required ones for plugins, fixes https://github.com/chipsalliance/synlig/pull/1972 https://github.com/dau-dev/tools/issues/6 2023-09-15 14:31:08 -04:00
github-actions[bot]
b84ed5d3ad Bump version 2023-09-14 00:14:42 +00:00
Catherine
c7d7cfeaca Update ABC for WASI support. 2023-09-13 16:43:30 +01:00
Miodrag Milanović
eada408983
Merge pull request #3931 from whitequark/update-abc 
Update ABC for WASI support
 2023-09-13 13:40:49 +02:00
Miodrag Milanović
d79b4b2218
Merge pull request #3903 from jix/dft-future_ff 
Basic support for tag primitives and `$future_ff`
 2023-09-13 13:40:10 +02:00
Catherine
e9a11dd088 Update ABC for WASI support. 2023-09-13 11:39:30 +00:00
Jannis Harder
0e8a4adb59 verific: Update YOSYSHQ_VERIFIC_API_VERSION 2023-09-13 11:32:36 +02:00
Jannis Harder
62b4df4989 dft_tag: Implement $overwrite_tag and $original_tag 
This does not correctly handle an `$overwrite_tag` on a module output,
but since we currently require the user to flatten the design for
cross-module dft, this cannot be observed from within the design, only
by manually inspecting the signals in the design.
 2023-09-13 11:32:36 +02:00
Jannis Harder
78ff40d1b2 Run future as part of prep 2023-09-13 11:32:36 +02:00
Jannis Harder
46a35da28c Add future pass to resolve $future_ff cells 2023-09-13 11:32:36 +02:00
Jannis Harder
7a0c37b62d Initial dft_tag implementation 
This is still missing a mode to rewrite $overwrite_tag and $original_tag
by injecting $set_tag and $get_tag in the right places. It's also
missing bit-precise propagation models for shifts and arithmetic and
requires the design to be flattened.
 2023-09-13 11:32:36 +02:00
Miodrag Milanovic
27ac912709 Support import of $future_ff 2023-09-13 11:32:36 +02:00
Miodrag Milanovic
9c255c98b1 unescape string tag attribute 2023-09-13 11:32:36 +02:00
Miodrag Milanovic
54050a8c16 Basic support for tag primitives 2023-09-13 11:32:36 +02:00
github-actions[bot]
9e004426e0 Bump version 2023-09-13 00:14:55 +00:00
Martin Povišer
08f79d111e ci: Enable extra libstdc++ assertions 2023-09-12 19:45:07 +02:00
Martin Povišer
05f0262d77
Merge pull request #3929 from YosysHQ/gatecat/fmt-fix 
fmt: Fix C++ string assertion when buf is empty
 2023-09-12 19:44:17 +02:00
Martin Povišer
b04f2352bb
Merge pull request #3928 from povik/mem-wr-merge-transpemu-fix 
mem: Fix index confusion in write port merging
 2023-09-12 19:43:58 +02:00
gatecat
98b9459535 fmt: Fix C++ string assertion when buf is empty 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-09-12 18:12:07 +02:00
Martin Povišer
cbc4ec8178 mem: Fix index confusion in write port merging 
Fix mistaking the read-port and write-port indices for each other when
we are adding the partial transparency emulation to be able to merge two
write ports.
 2023-09-12 16:43:59 +02:00
Miodrag Milanović
88ce47e4f0
Merge pull request #3892 from QuantamHD/dont_use 
abc: Exposes dont_use flag in ABC
 2023-09-12 14:58:44 +02:00
Miodrag Milanović
1b5c7b8dd7
Merge pull request #3927 from YosysHQ/verific_memory 
verific - respect order of read and write for rams
 2023-09-12 14:58:02 +02:00
Miodrag Milanović
ec75b24b8a
Merge pull request #3926 from YosysHQ/update_abc2 
Update ABC to latest
 2023-09-12 14:57:50 +02:00