Route the (2^k-1)-x -> ~x rewrite through OptExprPatcher like its
sibling transforms in this file, instead of raw module->Not +
module->connect + module->remove. Loosen the postopt assertion to
tolerate the $input_port shim cell bufnorm adds for the (still
signorm-active) input port, matching the t:$*_port %d idiom already
used by opt_expr_alu.ys and other sibling tests.
CC_LUT2 1 (was 2), CC_L2T4 max 15 (was 14) reflect the cell mapping
produced after the proc src-location changes.
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
derived_name and the template's marker wire are interned in map->twines;
decoding them with design->twines read an out-of-range/foreign pool slot
(garbage, or a crash once pool sizes diverge) in the _TECHMAP_FAIL_ log.
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
add(std::string) tags bare strings as public names, so a single-source
concat (which returns the lone ref unchanged) decoded with a spurious
'\' prefix, splitting one source file into two in linecoverage output.
add(Twine{}) stores the location string verbatim like set_src_attr.
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
kernel/compressor_tree.cc, passes/tests/test_kogge_stone.cc,
passes/opt/peepopt_shiftpow2.pmg, and techlibs/lattice/lattice_dsp_nexus.pmg
(plus the 5 new constids it needs: A0, B0, PIPELINED, SIGNED, SUBTRACT)
were all added to main after the emil/twines-proc-srcloc fork point, so no
commit in this phase's range ever touches them. They still use the old
IdString-based addWire/addCell/setPort/getParam APIs (NEW_ID, plain \X
port names) that the twine migration replaces, so they fail to build
against current HEAD. Not attributable to any single commit in this
phase per task.md's carve-out for genuinely phase-spanning fixes -
bundled here as its own commit rather than folded into an unrelated
pick.
