mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-01-26 11:58:44 +00:00
Code Activity

proc_mux: include switch expression location in $eq src

Browse source
This commit is contained in:
Emil J. Tywoniak 2026-01-26 12:02:09 +01:00
parent 53585db9f7
commit 383daa1eb3
2 changed files with 9 additions and 4 deletions
Download patch file Download diff file Expand all files Collapse all files

7
passes/proc/proc_mux.cc
View file

@ -248,8 +248,13 @@ struct MuxGenCtx {
// create compare cell
RTLIL::Cell *eq_cell = mod->addCell(stringf("%s_CMP%d", sstr.str(), cmp_wire->width), ifxmode ? ID($eqx) : ID($eq));
apply_attrs(eq_cell, cs);
pool<std::string> eq_sources;
if (cs->compare_src.size())
eq_cell->attributes[ID::src] = cs->compare_src;
eq_sources.insert(cs->compare_src.decode_string());
if (sw->signal_src.size())
eq_sources.insert(sw->signal_src.decode_string());
if (eq_sources.size())
eq_cell->set_strpool_attribute(ID::src, eq_sources);
eq_cell->parameters[ID::A_SIGNED] = RTLIL::Const(0);
eq_cell->parameters[ID::B_SIGNED] = RTLIL::Const(0);

6
tests/proc/proc_mux_src.ys
View file

@ -1,10 +1,10 @@
read_verilog proc_mux_src.v
proc -noopt
check -assert
# eq refer to the values compared against
# eq refer to both sides of the comparison of switch signal vs case value
select -assert-count 2 tiny2/t:$eq
select -assert-count 1 tiny2/t:$eq a:src=proc_mux_src.v:81.4-81.10 %i
select -assert-count 1 tiny2/t:$eq a:src=proc_mux_src.v:84.4-84.10 %i
select -assert-count 1 tiny2/t:$eq a:src=proc_mux_src.v:80.9-80.11|proc_mux_src.v:81.4-81.10 %i
select -assert-count 1 tiny2/t:$eq a:src=proc_mux_src.v:80.9-80.11|proc_mux_src.v:84.4-84.10 %i
# Flops cover the assigned to wire and whole process
select -assert-count 1 tiny2/t:$dff
select -assert-count 1 tiny2/t:$dff a:src=proc_mux_src.v:76.19-76.22|proc_mux_src.v:78.2-91.5