3724 commits

Author	SHA1	Message	Date
Clifford Wolf	bcc873b805	Fixed some visual studio warnings	2016-02-13 17:31:24 +01:00
Clifford Wolf	0d7fd2585e	Added "int ceil_log2(int)" function	2016-02-13 16:52:16 +01:00
Clifford Wolf	825b99efc1	Added "stat -liberty" for calculating chip area	2016-02-04 12:26:13 +01:00
Clifford Wolf	801c022457	Improved dffsr2dff pass	2016-02-02 19:42:49 +01:00
Clifford Wolf	d69395ca08	Added dffsr2dff	2016-02-02 17:19:01 +01:00
Clifford Wolf	d6592d5b99	Use alphanumerical order instead of idstring idx in opt_clean compare_signals()	2016-02-02 09:16:18 +01:00
Clifford Wolf	17372d8abd	Added "abc -luts" option, Improved Xilinx logic mapping	2016-02-01 12:40:32 +01:00
Clifford Wolf	9251553592	Improvements in dfflibmap (FFs with Q/QN outputs, DFFs from ADFFs)	2016-02-01 11:49:11 +01:00
Clifford Wolf	71f418c468	More clang sanitizer stuff	2016-01-31 19:55:48 +01:00
Clifford Wolf	8b3f8cd220	Added "equiv_struct -fwonly"	2016-01-08 10:59:16 +01:00
Clifford Wolf	f5008f4f8a	Bugfixes in equiv_struct	2016-01-08 09:57:28 +01:00
Clifford Wolf	d00c63c927	Added "submod -copy"	2016-01-08 09:08:12 +01:00
Clifford Wolf	c3fd03d722	Added "equiv_struct -maxiter <N>"	2016-01-06 13:54:54 +01:00
Clifford Wolf	1f8c47fb47	Added "equiv_add -try" mode	2016-01-06 13:54:00 +01:00
Clifford Wolf	1d62f8710f	Fixed "splitnets -ports" for hierarchical designs	2015-12-22 13:25:00 +01:00
Clifford Wolf	ab0c44d3ed	Added %R select expression	2015-12-20 13:35:58 +01:00
Clifford Wolf	1ea6db3db8	Improved proc_mux performance for huge always blocks	2015-12-02 22:02:20 +01:00
Clifford Wolf	e61c7f887a	Added torder command	2015-11-19 15:34:32 +01:00
Clifford Wolf	d98d99aec6	Added "abc -g"	2015-11-10 11:10:11 +01:00
Marcus Comstedt	8c2bdef36d	Fix a segfault in dffinit when the value has too few bits ... The code was already trying to add the required number of bits, but fell one short of the mark.	2015-11-08 19:16:56 +01:00
Clifford Wolf	1ec6429bad	Added "singleton" pass	2015-11-07 19:10:43 +01:00
Clifford Wolf	f401eeb0cf	Bugfix in mapping $tribuf to $_TBUF_	2015-11-05 12:37:43 +01:00
Clifford Wolf	ddf3e2dc65	Bugfix in memory_dff	2015-10-31 22:01:41 +01:00
Clifford Wolf	ccdbf41be6	Improvements in wreduce	2015-10-31 13:39:30 +01:00
Clifford Wolf	0c202a2549	Use mfp<> in equiv_mark	2015-10-27 19:15:35 +01:00
Clifford Wolf	27714acd8a	Improvements in equiv_struct	2015-10-25 22:04:20 +01:00
Clifford Wolf	d014ba2d0e	Major refactoring of equiv_struct	2015-10-25 19:31:29 +01:00
Clifford Wolf	207736b4ee	Import more std:: stuff into Yosys namespace	2015-10-25 19:30:49 +01:00
Clifford Wolf	da923c198e	Added "equiv_add -cell"	2015-10-25 14:35:40 +01:00
Clifford Wolf	83bd27bf6e	equiv_struct now creates equiv_merged attributes	2015-10-25 02:15:20 +02:00
Clifford Wolf	453736d918	Improvements in equiv_struct	2015-10-24 23:04:17 +02:00
Clifford Wolf	7f110e7018	renamed SigSpec::to_single_sigbit() to SigSpec::as_bit(), added is_bit()	2015-10-24 22:56:40 +02:00
Clifford Wolf	6af8076967	improvement in "stat"	2015-10-24 21:56:53 +02:00
Clifford Wolf	6fe48cf41e	equiv_purge bugfix, using SigChunk in Yosys namespace	2015-10-24 19:09:45 +02:00
Clifford Wolf	2a0f577f83	Fixed handling of driver-driver conflicts in wreduce	2015-10-24 13:44:35 +02:00
Clifford Wolf	4cec1c058d	Added equiv_mark command	2015-10-23 23:56:58 +02:00
Clifford Wolf	c35db8c19e	Disabled "Skipping blackbox module" msg in show command	2015-10-23 20:11:05 +02:00
Clifford Wolf	15a67392f1	Also merge $equiv cells in equiv_struct	2015-10-23 15:26:58 +02:00
Clifford Wolf	d19069b0fb	Improvements in equiv_struct	2015-10-23 15:11:57 +02:00
Clifford Wolf	84a07ffb8a	Added equiv_purge	2015-10-22 15:40:27 +02:00
Clifford Wolf	00e05b1310	Added equiv_struct command	2015-10-21 17:12:35 +02:00
Clifford Wolf	6416dfee93	Improved inout handling in equiv_make	2015-10-21 15:42:50 +02:00
Clifford Wolf	1d83854d84	Bugfixes in handling of "keep" attribute on wires	2015-10-15 14:57:28 +02:00
Clifford Wolf	eb1e3caae7	Fixed "flatten" for unconnected inout ports	2015-10-13 10:30:23 +02:00
Clifford Wolf	c58bd5dc30	Added edgetypes command	2015-09-27 11:53:20 +02:00
Clifford Wolf	281c1f4029	Some cleanups in qwp	2015-09-26 10:42:27 +02:00
Clifford Wolf	ddcfc99f8c	Added "test_cell -noeval"	2015-09-25 17:27:18 +02:00
Clifford Wolf	82028c42e0	Added wreduce $mul support and fixed signed $mul opt_const bug	2015-09-25 17:27:06 +02:00
Clifford Wolf	4864736167	Bugfix in bram read-enable code	2015-09-25 14:22:33 +02:00
Clifford Wolf	924d9d6e86	Added read-enable to memory model	2015-09-25 12:23:11 +02:00