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19066 commits 136 branches 69 tags 63 MiB
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Author SHA1 Message Date
nella
5d4d94a5dd Fix mac compile. 2026-04-23 12:43:43 +02:00
nella
94a215b4f7 Add dont_use_cells to scl cache. 2026-04-23 12:43:43 +02:00
nella
edd3ad525e Add scl caching to abc_new. 2026-04-23 12:43:43 +02:00
nella
9143178343 Merge liberty files into stripped scl files. 2026-04-23 12:43:43 +02:00
Akash Levy
65aad25a61 Smallfix for bison 2026-04-22 12:06:10 -07:00
Akash Levy
e6f84b3b5b Ensure verilog flex/bison symbols are overridden properly 2026-04-22 10:43:52 -07:00
Miodrag Milanovic
bc83311dd8 Update ABC as per 2026-04-22 2026-04-22 17:37:25 +02:00
Akash Levy
099a3c881b
Merge pull request #150 from Silimate/reenable_vhdl 
Reenable VHDL
 2026-04-22 04:10:29 -07:00
Emil J
64e7ce2f57
Merge pull request #5803 from YosysHQ/emil/specrule-port-sanity 
Fix $specrule port naming inconsistency
 2026-04-22 10:46:36 +00:00
Akash Levy
bf40364bd0 No operator optimization, but it passes all tests 2026-04-22 03:12:26 -07:00
Emil J. Tywoniak
f213a34427 Remove FHS dependency by replacing /bin/bash with /usr/bin/env bash everywhere 2026-04-22 10:39:19 +02:00
Emil J
70ee009dd9
Merge pull request #5823 from petterreinholdtsen/spelling-error-frontends-ast-genrtlil 
Fixed spelling error in message of frontends/ast/genrtlil.cc.
 2026-04-22 08:18:07 +00:00
Miodrag Milanović
3ccbd38cc6
Merge pull request #5768 from YosysHQ/tests 
Update tests and test infrastructure
 2026-04-22 06:16:05 +00:00
Petter Reinholdtsen
a89e8fd869 Fixed spelling error in message of frontends/ast/genrtlil.cc. 
Patch by Ruben Undheim via the Debian project.  The patch originated
as 0009-Some-spelling-errors-fixed.patch and was dated 2018-07-12
there.

See also issue #5805.
 2026-04-22 04:30:18 +02:00
Lofty
ed5d122174
Merge pull request #5793 from YosysHQ/lofty/abc-refactor-4 
read/write_xaiger2: further cleanup [sc-269]
 2026-04-21 12:13:42 +00:00
Akash Levy
e7b60200d2
Merge pull request #156 from Silimate/splitcells 
[ENG-1923] - Splitcells pass overlap bug
 2026-04-21 03:31:59 -07:00
N. Engelhardt
2da90a5ad6
Merge pull request #5819 from YosysHQ/xprop_ignore_scopeinfo 
xprop: ignore $scopeinfo cells
 2026-04-21 09:31:44 +00:00
N. Engelhardt
240f7030b2 xprop: ignore $scopeinfo cells 2026-04-21 10:52:50 +02:00
Stan Lee
90c2bbe1d4 factor offset 2026-04-20 17:26:30 -07:00
Stan Lee
5f538db621 fix 2026-04-20 17:17:37 -07:00
Stan Lee
f377bb04e4 pull main 2026-04-20 16:57:15 -07:00
Akash Levy
c05efa055b
Merge pull request #155 from Silimate/fork-scope 
[CUS-486] Strip $fork scope and N-dim register flattening
 2026-04-20 16:43:16 -07:00
Akash Levy
47a5a626e3
Merge pull request #153 from Silimate/reg-rename 
[ENG-1918] Handle edge cases in register renaming
 2026-04-20 16:40:16 -07:00
Stan Lee
553ea0a173 edit 2026-04-20 16:11:28 -07:00
Stan Lee
5f663796ad oops 2026-04-20 15:22:18 -07:00
Stan Lee
38f97edb45 Merge branch 'main' of github.com:silimate/yosys into fork-scope 2026-04-20 15:21:20 -07:00
Stan Lee
1646f7712a bugfix 2026-04-20 15:12:56 -07:00
Stan Lee
102cbb8c0a splitcells reg split fix 2026-04-20 15:07:09 -07:00
Stan Lee
fb9a64086e undo 2026-04-20 14:47:57 -07:00
Stan Lee
1bc33bc8c5 re-trigger 2026-04-20 14:47:43 -07:00
Stan Lee
29f8c13ab7 greptile 2026-04-20 13:57:36 -07:00
Stan Lee
63b61f04d0 further remove 2026-04-20 13:42:57 -07:00
Stan Lee
608ed37a6d N-dimensional regs 2026-04-20 13:42:08 -07:00
Stan Lee
39b36fa5f5 update autoscoping to ahndle fork scopes 2026-04-20 12:40:59 -07:00
Akash Levy
78874dfccd
Merge pull request #152 from Silimate/sim 
[ENG-1911] Registers should be annotated every cycle in 'sim'
 2026-04-20 12:11:49 -07:00
Stan Lee
a92a086a0d remove VCD parse method for fork scopes, handle on frontend side 2026-04-20 12:02:35 -07:00
Stan Lee
8653fea875 fix 2026-04-20 09:45:07 -07:00
Stan Lee
9e05fb7606 comments 2026-04-20 09:40:40 -07:00
Akash Levy
8823608317
Merge pull request #154 from Silimate/opt_expr_cmp_const 
opt_expr for constant comparisons
 2026-04-20 03:24:02 -07:00
Emil J
22ef992189
Merge pull request #5816 from petterreinholdtsen/proc-no-path-max 
Rewrote Linux edition of proc_self_dirname() to handle any symlink length.
 2026-04-20 09:47:59 +00:00
Akash Levy
8485d57841 opt_expr for constant comparisons 2026-04-20 02:03:35 -07:00
Lofty
33fba24158
Merge pull request #5811 from YosysHQ/emil/abc-fix-deferred-logs 
abc: fix deferred logs
 2026-04-20 07:56:45 +00:00
Stan Lee
3b7613d858 guard for multiple drivers 2026-04-19 21:30:12 -07:00
Stan Lee
d4bfebd0da offsets supported in reg_rename 2026-04-19 20:00:09 -07:00
Petter Reinholdtsen
89d360aa4a Rewrote Linux edition of proc_self_dirname() to handle any symlink length. 
This make sure the method work also when the program is located in
deep or long file paths, longer than both PATH_MAX and "getconf
PATH_MAX .".  Use the same code on GNU Hurd, where it now work.

I am not sure how to test this in a platform independent way.
 2026-04-19 20:56:05 +02:00
George Haworth
aba5b279c6 Fix RAMB36E1/E2 SDP parity port mapping typo 
DIPBDIP/DINPBDINP condition checked PORT_W_WIDTH == 71, which never
matches any valid SDP width. Should be 72, matching the DIBDI/DINBDIN
condition on the line above. This caused data bits 68-69 to be
silently overwritten with copies of bits 64-65 on every write.

Affects both xc6v (RAMB36E1, Artix-7/Kintex-7/Virtex-7) and xcu
(RAMB36E2, UltraScale/UltraScale+) mapping templates. The RAMB18E1/E2
equivalents correctly use == 36.
 2026-04-18 19:10:18 +03:00
Stan Lee
da1072d77d add flag to toggle reg overwriting 2026-04-17 15:10:40 -07:00
Stan Lee
07ae46f1ea comments and cleanup 2026-04-17 11:31:25 -07:00
Stan Lee
1298607d95 fix compilation err 2026-04-17 10:29:13 -07:00
Stan Lee
e7ffe7a7df override register states 2026-04-17 10:27:45 -07:00