Mike Inouye
1e3973c5cb
Explictly #include <variant> for std::variant usage.
...
Signed-off-by: Mike Inouye <mikeinouye@google.com>
2024-10-07 21:57:30 +00:00
Jannis Harder
b3b88e56d4
Merge pull request #4609 from georgerennie/george/smtbmc_paths
...
smtbmc: escape path identifiers
2024-10-07 20:36:24 +02:00
Martin Povišer
9479d3bd3c
Merge pull request #4637 from YosysHQ/emil/bufnorm-warning
...
bufnorm: avoid warning. NFC
2024-10-07 18:01:42 +02:00
Emil J. Tywoniak
a76bcdc58f
bufnorm: avoid remove warning. NFC
2024-10-07 17:58:48 +02:00
Martin Povišer
e46cc57cc4
Merge pull request #4613 from povik/err-never-silence
...
log: Never silence `log_cmd_error`
2024-10-07 16:12:31 +02:00
Martin Povišer
0556cb50a9
Merge pull request #4628 from povik/bump-abc
...
Bump abc submodule
2024-10-07 16:12:04 +02:00
Martin Povišer
0aab8b4158
Merge pull request #4605 from povik/liberty-unit-delay
...
read_liberty: Optionally import unit delay arcs
2024-10-07 16:11:51 +02:00
Martin Povišer
74e92d10e8
Merge pull request #4593 from povik/aiger2
...
New aiger backend
2024-10-07 16:11:25 +02:00
Martin Povišer
6c1450fdaf
Merge pull request #4607 from povik/ql-nodiv
...
quicklogic: Avoid carry chains in division mapping
2024-10-07 16:11:11 +02:00
Martin Povišer
ca5c2fdff1
quicklogic: Relax the LUT number test
2024-10-07 15:27:03 +02:00
Martin Povišer
b01b17689e
Add test of error not getting silenced
2024-10-07 14:49:17 +02:00
Martin Povišer
7989d53c58
read_xaiger2: Add help
2024-10-07 14:19:49 +02:00
Martin Povišer
f44a418212
read_xaiger2: Add casts to silence warnings
2024-10-07 12:27:54 +02:00
Martin Povišer
72f0fea9e8
aiger2: Try to fix VS build
2024-10-07 12:27:37 +02:00
Martin Povišer
d0a11e26f3
aiger2: Add test of writing a flattened view
2024-10-07 12:04:33 +02:00
Martin Povišer
47fd2b9deb
aiger2: Update help
2024-10-07 12:03:49 +02:00
Martin Povišer
373e7a1485
aiger2: Fix print
2024-10-07 12:03:49 +02:00
Martin Povišer
ebe51e206e
aiger2: Fix warnings
2024-10-07 12:03:49 +02:00
Martin Povišer
2e587c835f
abc9_exe: Document SC mapping options
2024-10-07 12:03:49 +02:00
Martin Povišer
3b6dcc7bd0
abc9_exe: Remove -genlib option
2024-10-07 12:03:49 +02:00
Martin Povišer
ac79a052ba
aiger2: Adjust help
2024-10-07 12:03:49 +02:00
Martin Povišer
81688e3ba2
aigsize: Remove
2024-10-07 12:03:49 +02:00
Martin Povišer
e0a86d5483
abc_new: Start new command for aiger2-based round trip
2024-10-07 12:03:49 +02:00
Martin Povišer
b8f389370b
aiger2: Convert x-states to zeroes
2024-10-07 12:03:48 +02:00
Martin Povišer
4c0a8a1326
aiger2: Add analysis step to order boxes
2024-10-07 12:03:48 +02:00
Martin Povišer
f7c7371ea9
aiger2: Fix relative ordering of PI/POs and box I/Os
2024-10-07 12:03:48 +02:00
Martin Povišer
8d12492610
read_xaiger2: Fix detecting the end of extensions
2024-10-07 12:03:48 +02:00
Martin Povišer
2b1b5652f1
Adjust read_xaiger2 prints
2024-10-07 12:03:48 +02:00
Martin Povišer
e58a9b6ab6
abc9: Understand ASIC options similar to abc
2024-10-07 12:03:48 +02:00
Martin Povišer
d4e009fc2f
aiger2: Add TODO
2024-10-07 12:03:48 +02:00
Emil J. Tywoniak
3e6e8c892e
Bump abc submodule
2024-10-07 11:09:02 +02:00
Emil J
1f517d6c7d
Merge pull request #4553 from donn/python_scriptfile
...
-y flag for libyosys Python scripts
2024-10-07 11:02:40 +02:00
github-actions[bot]
6155c59d00
Bump version
2024-10-07 00:21:37 +00:00
KrystalDelusion
3534e6b52d
Merge pull request #4632 from tarikgraba/main
...
docs: avoid concurrency issues when generating images in parallel
2024-10-07 10:33:02 +13:00
Krystine Sherwin
571d181fb4
Fix top-level make docs prerequisites
...
Add `$(TARGETS)` for gen_examples and gen_images since they need the `yosys` executable.
Add guidelines source files as a prerequisite to docs/source/generated while we're at it.
2024-10-07 10:26:29 +13:00
Krystine Sherwin
d8038c11d1
Add -j flag to make docs CI
2024-10-07 10:07:17 +13:00
TG
5841b44543
docs: Simplify images generation to allow parallel build
...
- remove the tidy target from the main target.
* aux/log file are already excluded in a .gititgnore file
* allow parallel generation as the tidy target imposes sequential build
2024-10-06 08:38:16 +02:00
Lofty
13ecbd5c76
quicklogic: test that dividing by a constant does not infer carry chains
2024-10-03 20:05:28 +01:00
github-actions[bot]
1bf908dea8
Bump version
2024-10-01 00:23:05 +00:00
Miodrag Milanović
500db6acc6
Merge pull request #4621 from RCoeurjoly/roland/get_vcd2fst
...
Add "Get vcd2fst" step to test-yosys job
2024-09-30 21:38:39 +02:00
Mohamed Gaber
35c8ad61ac
cli/python: error-checking, python interpreter bugfix
...
* Less brittle method of adding script dirname to sys.path
* Check if scriptfp successfully opens before using it
* Move `log_error` to after `PyErr_Print()` is called
2024-09-30 17:38:43 +03:00
Roland Coeurjoly
5fca9b867d
Add Get vcd2fst step to test-yosys job
...
Co-authored-by: Miodrag Milanovic <mmicko@gmail.com>
Co-authored-by: Roland Coeurjoly <rolandcoeurjoly@gmail.com>
2024-09-30 16:25:32 +02:00
github-actions[bot]
59404f8ce5
Bump version
2024-09-30 00:21:26 +00:00
rherveille
ce7db661a8
Added cast to type support ( #4284 )
2024-09-29 17:03:01 -04:00
Martin Povišer
3e3515e7d9
log: Never silence log_cmd_error
...
Add extra handling to arrange for `log_cmd_error` never being silenced
by the command line `-v N` option. Similar path for `log_error` exists
already.
2024-09-24 17:47:46 +02:00
George Rennie
b788de9329
smtbmc: escape path identifiers
...
* also changes the print format for cover statements to be more uniform
with the asserts, allowing easier parsing of cover path
* this allows diambiguation of properties with the same name but
different paths (see https://github.com/YosysHQ/sby/issues/296 )
2024-09-24 03:01:49 +01:00
N. Engelhardt
8e1e2b9a39
Merge pull request #4495 from povik/check-avert-costly-detail
2024-09-23 15:19:48 +02:00
Martin Povišer
9018d06a33
quicklogic: Avoid carry chains in division mapping
...
The default mapping rules for division-like operations (div/divfloor/
mod/modfloor) invoke subtractions which can get mapped to carry chains
in FPGA flows. Optimizations across carry chains are weak, so in
practice this ends up too costly compared to implementing the division
purely in soft logic.
For this reason arrange for `techmap.v` ignoring division operations
under `-D NODIV`, and use this mode in `synth_quicklogic` to avoid carry
chains for divisions.
2024-09-19 12:18:47 +02:00
Martin Povišer
f168b2f4b1
read_xaiger2: Update box handling
2024-09-18 16:55:02 +02:00
Martin Povišer
3a1b003cc3
celltypes: Fix $buf eval
2024-09-18 16:55:02 +02:00
