818 commits

Author	SHA1	Message	Date
Clifford Wolf	2935e8ea41	Update copyright header ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-03-04 21:31:10 +01:00
Clifford Wolf	eb67a7532b	Add $allconst and $allseq cell types ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-02-23 13:14:47 +01:00
Clifford Wolf	82c436587c	Do not create deep backtraces unless in ENABLE_DEBUG mode ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-02-03 15:04:39 +01:00
Clifford Wolf	a96c775a73	Add support for "yosys -E" ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-01-07 16:36:13 +01:00
Clifford Wolf	c80315cea4	Bugfix in hierarchy handling of blackbox module ports ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2018-01-05 13:28:45 +01:00
Clifford Wolf	76afff7ef6	Add RTLIL::Const::is_fully_ones()	2017-12-14 02:06:39 +01:00
Clifford Wolf	96ad688849	Add SigSpec::is_fully_ones()	2017-12-14 01:29:09 +01:00
Kevin Kiningham	7350f7692a	Use quote includes for yosys.h	2017-12-13 13:27:52 -08:00
Clifford Wolf	9ae25039fb	Add support for editline as replacement for readline	2017-11-08 02:55:00 +01:00
Clifford Wolf	13eb47c692	Add src arguments to all cell creator helper functions	2017-09-09 10:16:48 +02:00
Clifford Wolf	8a66bd30c6	Update more stuff to use get_src_attribute() and set_src_attribute()	2017-09-01 12:26:55 +02:00
Jason Lowdermilk	71d43cfc08	Merge remote-tracking branch 'upstream/master'	2017-08-30 11:47:06 -06:00
Jason Lowdermilk	271e8ba7cd	fix indent level	2017-08-30 11:46:41 -06:00
Clifford Wolf	8530333439	Add {get,set}_src_attribute() methods on RTLIL::AttrObject	2017-08-30 11:39:11 +02:00
Jason Lowdermilk	32c0f1193e	Add support for source line tracking through synthesis phase	2017-08-29 14:46:35 -06:00
Clifford Wolf	d3b3dd8e88	Add hashlib support for hashing of pools	2017-08-22 13:04:33 +02:00
Clifford Wolf	bce0bb6e43	Add consteval support for $_ANDNOT_ and $_ORNOT_	2017-08-22 13:04:05 +02:00
Clifford Wolf	4ba5bd12c6	Add Const methods is_fully_zero(), is_fully_def(), and is_fully_undef()	2017-08-18 11:40:08 +02:00
Clifford Wolf	159701962a	Auto-detect JSON front-end	2017-08-09 13:28:52 +02:00
Clifford Wolf	2336d5508b	Add log_warning_noprefix() API, Use for Verific warnings and errors	2017-07-27 12:17:04 +02:00
Clifford Wolf	493fedbaf9	Add "using std::get" to yosys.h	2017-07-25 14:52:34 +02:00
Clifford Wolf	c251e3a576	Change intptr_t to uintptr_t in hashlib.h	2017-07-18 17:38:19 +02:00
Robert Ou	f0741698fa	Fix build warnings for win64 ... Win64 has a 32-bit long. Use intptr_t to work on any data model.	2017-07-17 12:36:43 -07:00
Clifford Wolf	1f517d2b96	Fix history namespace collision	2017-06-20 05:26:12 +02:00
Clifford Wolf	c0ca99483c	Store command history when terminating with an error	2017-06-20 04:41:58 +02:00
Clifford Wolf	05df3dbee4	Add "setundef -anyseq"	2017-05-28 11:59:05 +02:00
Clifford Wolf	662a047815	Enable readline and tcl in mxe builds	2017-05-17 20:46:22 +02:00
Clifford Wolf	6934b862d3	Add missing AndnotGate() and OrnotGate() declarations to rtlil.h	2017-05-17 19:10:57 +02:00
Clifford Wolf	05cdd58c8d	Add $_ANDNOT_ and $_ORNOT_ gates	2017-05-17 09:08:29 +02:00
Clifford Wolf	fcb274a564	Add ConstEval defaultval feature	2017-04-05 11:25:22 +02:00
Clifford Wolf	b8d7f57f61	Add front-end detection for *.tcl files	2017-03-28 12:13:58 +02:00
Clifford Wolf	5f1d0b1024	Add $live and $fair cell types, add support for s_eventually keyword	2017-02-25 10:36:39 +01:00
Clifford Wolf	c6d8d70109	Fix mingw compile issue (2nd attempt)	2017-02-23 14:21:02 +01:00
Clifford Wolf	0822b21844	Fix mingw compile issue (maybe.. I can't test it)	2017-02-23 13:59:02 +01:00
Clifford Wolf	e6d56d23b5	Fix eval implementation of $_NOR_	2017-02-16 12:17:03 +01:00
Clifford Wolf	828303791b	Add "yosys -w" for suppressing warnings	2017-02-12 11:11:00 +01:00
Clifford Wolf	63dfdb5d7f	Add log_wire() API	2017-02-11 11:08:36 +01:00
Clifford Wolf	aab58045a8	Fix undef propagation bug in $pmux SAT model	2017-02-05 22:43:33 +01:00
Clifford Wolf	3928482a3c	Add $cover cell type and SVA cover() support	2017-02-04 14:14:26 +01:00
Clifford Wolf	b54972c112	Fix RTLIL::Memory::start_offset initialization	2017-01-25 17:00:59 +01:00
Clifford Wolf	6b2c23c721	Bugfix in RTLIL::SigSpec::remove2()	2016-12-31 16:14:42 +01:00
Clifford Wolf	33a22f8768	Simplified log_spacer() code	2016-12-23 02:06:46 +01:00
Clifford Wolf	a0dff87a57	Added "yosys -W regex"	2016-12-22 23:41:44 +01:00
Clifford Wolf	f144adec58	Added AIGER back-end to automatic back-end detection	2016-12-21 10:16:47 +01:00
Clifford Wolf	00761de1b7	Bugfix in comment handling	2016-12-13 13:48:09 +01:00
Clifford Wolf	a926a6afc2	Remember global declarations and defines accross read_verilog calls	2016-11-15 12:42:43 +01:00
Clifford Wolf	fa535c0b00	Some minor build fixes for Visual C	2016-10-14 18:36:02 +02:00
Clifford Wolf	bdc316db50	Added $anyseq cell type	2016-10-14 15:24:03 +02:00
Clifford Wolf	53655d173b	Added $global_clock verilog syntax support for creating $ff cells	2016-10-14 12:33:56 +02:00
Clifford Wolf	8ebba8a35f	Added $ff and $_FF_ cell types	2016-10-12 01:18:39 +02:00