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Author	SHA1	Message	Date
Eddie Hung	13bf036bd6	Use ConstEval to compute LUT masks	2019-02-13 17:00:00 -08:00
Eddie Hung	f0f5d8a5cc	Merge remote-tracking branch 'origin/read_aiger' into xaig	2019-02-13 14:09:36 -08:00
Eddie Hung	06cf0555ee	Merge https://github.com/YosysHQ/yosys into xaig	2019-02-13 14:08:31 -08:00
Eddie Hung	87f059adf7	Rip out some more stuff	2019-02-13 10:44:52 -08:00
Clifford Wolf	807b3c7697	Fix sign handling of real constants ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-02-13 12:36:47 +01:00
Eddie Hung	045f7763ae	Rip out unused functions in abc9	2019-02-12 16:25:22 -08:00
Eddie Hung	e9df9a466a	Add support for read_aiger -wideports	2019-02-12 12:58:10 -08:00
Eddie Hung	06ba81d41f	Add support for read_aiger -map	2019-02-12 12:16:37 -08:00
Eddie Hung	77d3627753	Parse 'm' in xaiger	2019-02-12 09:36:22 -08:00
Eddie Hung	b3341b4abb	WIP for ABC with aiger	2019-02-12 09:31:22 -08:00
Eddie Hung	c23e3f0751	Missing headers for Xcode?	2019-02-12 09:24:13 -08:00
Eddie Hung	6faad18874	Merge branch 'read_aiger' of github.com:eddiehung/yosys into read_aiger	2019-02-12 09:21:46 -08:00
Eddie Hung	a2ae393811	Use module->add{Not,And}Gate() functions	2019-02-12 09:21:15 -08:00
Clifford Wolf	1f2548a564	Merge pull request #802 from whitequark/write_verilog_async_mem_ports ... write_verilog: correctly emit asynchronous transparent ports	2019-02-12 14:41:34 +01:00
Clifford Wolf	b9f6ed40b6	Merge pull request #806 from daveshah1/fsm_opt_no_reset ... fsm_opt: Fix runtime error for FSMs without a reset state	2019-02-12 14:39:39 +01:00
Eddie Hung	0124512f28	Add read_xaiger	2019-02-11 15:19:17 -08:00
Eddie Hung	ecd2446132	Add write_xaiger	2019-02-11 15:18:42 -08:00
Eddie Hung	04c580fde7	Do not break for constraints	2019-02-11 13:28:00 -08:00
Eddie Hung	727ba52504	No increment line_count for binary ANDs	2019-02-11 13:24:21 -08:00
Eddie Hung	bb4164481d	Do not ignore newline after AND in binary AIG	2019-02-11 11:51:44 -08:00
Eddie Hung	db08afe146	Copy backends/aiger/aiger.cc to xaiger.cc	2019-02-08 14:53:12 -08:00
Eddie Hung	fb6df09dd2	Merge remote-tracking branch 'origin/dff_init' into read_aiger	2019-02-08 14:42:08 -08:00
Eddie Hung	5a0a5aae4f	Compile abc9	2019-02-08 13:58:47 -08:00
Eddie Hung	edf7267019	Refactor kernel/cost.h definition into cost.cc	2019-02-08 13:58:20 -08:00
Eddie Hung	e25a22015f	Copy abc.cc to abc9.cc	2019-02-08 13:23:54 -08:00
Eddie Hung	8886fa5506	addDff -> addDffGate as per @daveshah1	2019-02-08 13:17:53 -08:00
Eddie Hung	afc3c4b613	Fix tabulation	2019-02-08 13:17:02 -08:00
Eddie Hung	aa66d8f12f	-module_name arg to go before -clk_name	2019-02-08 12:49:55 -08:00
Eddie Hung	587872236e	Support and differentiate between ASCII and binary AIG testing	2019-02-08 12:41:59 -08:00
Eddie Hung	391ec75b07	Add missing "[options]" to read_blif help	2019-02-08 12:41:39 -08:00
Eddie Hung	fb8ad440a3	Allow module name to be determined by argument too	2019-02-08 12:40:43 -08:00
Eddie Hung	f1befe1b44	Refactor into AigerReader class	2019-02-08 12:04:26 -08:00
Eddie Hung	2a8cc36578	Parse binary AIG files	2019-02-08 11:45:16 -08:00
Eddie Hung	4e6c5e4672	Add binary AIGs converted from AAG	2019-02-08 11:41:25 -08:00
Eddie Hung	09d758f0a3	Refactor to parse_aiger_header()	2019-02-08 10:54:31 -08:00
Eddie Hung	36c56bf412	Add comment	2019-02-08 08:37:44 -08:00
Eddie Hung	5e24251a61	Handle reset logic in latches	2019-02-08 08:37:18 -08:00
Eddie Hung	652e414392	Change literal vars from int to unsigned	2019-02-08 08:09:30 -08:00
Eddie Hung	fafa972238	Create clk outside of latch loop	2019-02-08 08:08:49 -08:00
Eddie Hung	02f603ac1a	Handle latch symbols too	2019-02-08 08:05:27 -08:00
Eddie Hung	5a593ff41c	Remove return after log_error	2019-02-08 08:04:48 -08:00
Eddie Hung	6dbeda1807	Add support for symbol tables	2019-02-08 08:03:40 -08:00
Eddie Hung	791f93181d	Stub for binary AIGER	2019-02-08 07:31:04 -08:00
David Shah	a4515712cb	fsm_opt: Fix runtime error for FSMs without a reset state ... Signed-off-by: David Shah <dave@ds0.me>	2019-02-07 10:35:36 +00:00
Eddie Hung	e8f4dc739c	Cope WIDTH of ff/latch cells is default of zero	2019-02-06 15:51:12 -08:00
Eddie Hung	40db2f2eb6	Refactor	2019-02-06 14:58:47 -08:00
Eddie Hung	20ca795b87	Remove check for cell->name[0] == '$'	2019-02-06 14:53:40 -08:00
Eddie Hung	4167b15de5	Merge branch 'dff_init' of https://github.com/eddiehung/yosys into xaig	2019-02-06 14:31:11 -08:00
Eddie Hung	3f87cf86cc	Revert most of autotest.sh; for non *.v use Yosys to translate	2019-02-06 14:30:19 -08:00
Eddie Hung	c373640a3a	Refactor	2019-02-06 14:28:44 -08:00