Emil J
ab614b1271
Merge pull request #5061 from YosysHQ/emil/fix-driver-xtrace
...
driver: fix -XX xtrace backtrace level
2025-04-28 10:31:40 +02:00
github-actions[bot]
58e7cfa559
Bump version
2025-04-27 00:25:27 +00:00
George Rennie
4fbb2bc1f3
celledges: use capped shift width
2025-04-26 18:34:21 +02:00
Catherine
3d1f2161dc
cxxrtl: strip $paramod from module name in scope info.
2025-04-26 14:51:21 +01:00
George Rennie
70a44f035c
tests: test opt_expr constant shift edge cases
2025-04-26 12:40:04 +02:00
George Rennie
c952ab417f
opt_expr: only sign extend shift arguments for arithmetic right shift
2025-04-26 12:40:04 +02:00
KrystalDelusion
2d6255175e
Merge pull request #5057 from secworks/blocking_assignment_greenpak4_cells_sim_digital
...
Change to use blocking assignments in non-clocked processes.
2025-04-26 11:15:10 +12:00
KrystalDelusion
6564810ae3
Merge pull request #4992 from Anhijkt/fix-ice40dsp-unsigned
...
ice40_dsp: fix const handling
2025-04-26 11:15:02 +12:00
KrystalDelusion
bcc4e86c9d
Merge pull request #5062 from YosysHQ/emil/fix-dangling-wiretype
...
simplify: fix struct wiretype attr memory leak
2025-04-26 11:04:38 +12:00
Krystine Sherwin
1e8adc6bd0
Makefile: Redirect all git output
...
For some platforms (Arch Linux, at least), `git status` reports errors on stdout instead of stderr, so we need to redirect that to `/dev/null` too. This also prevents `git status` from logging output when the yosys directory is a git repo, but is missing the abc folder.
2025-04-26 10:59:24 +12:00
Miodrag Milanović
febc07e6fb
Merge pull request #5039 from YosysHQ/gatemate_bram
...
gatemate: WRITE_THROUGH mode change
2025-04-25 09:53:43 +02:00
github-actions[bot]
94af24c801
Bump version
2025-04-25 00:23:50 +00:00
Emil J. Tywoniak
bdc2597f79
simplify: fix struct wiretype attr memory leak
2025-04-25 01:00:08 +02:00
Emil J. Tywoniak
3541db8bbb
driver: fix -X xtrace backtrace level
2025-04-25 00:51:10 +02:00
sdjasj
b693947834
fix udivmod crashes when operand value exceeds logical width
2025-04-24 14:33:52 +01:00
github-actions[bot]
c550c301dc
Bump version
2025-04-24 00:23:08 +00:00
Emil J
f8c027b70e
Merge pull request #5056 from secworks/blocking_assignment_gatemate_cells_sim
...
Change to blocking assignments in non-clocked process.
2025-04-23 23:13:54 +02:00
Emil J
209850e69d
Merge pull request #5055 from secworks/blocking_assignment_in_cells_sim
...
Changing non clocked alway assignment to blocking.
2025-04-23 23:01:33 +02:00
Emil J
6a4281ad4f
Merge pull request #5051 from mikesinouye/dff
...
Detect FF functions that use parentheses.
2025-04-23 22:36:35 +02:00
mikesinouye
fc053b6664
Merge branch 'main' into dff
2025-04-23 13:29:44 -07:00
Emil J. Tywoniak
9631f6ece5
liberty: fix tests
2025-04-23 20:20:43 +00:00
github-actions[bot]
a0d865c2bf
Bump version
2025-04-23 20:20:14 +00:00
Emil J
057dbbdca3
Merge pull request #5034 from YosysHQ/emil/liberty-fix-tests
...
liberty: fix tests
2025-04-23 21:40:54 +02:00
Mike Inouye
bf8aece4e4
Add test to verify that the liberty format is properly parsed.
2025-04-23 18:40:35 +00:00
Joachim Strömbergson
2fcb61adb5
Change to use blocking assignments in non-clocked processes.
...
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2025-04-23 17:21:32 +02:00
Joachim Strömbergson
90f50722ab
Change to blocking assignments in non-clocked process.
...
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2025-04-23 17:13:37 +02:00
Joachim Strömbergson
e4d6781088
Changing non clocked alway assignment to blocking.
...
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2025-04-23 16:59:53 +02:00
github-actions[bot]
bf20bc0848
Bump version
2025-04-23 00:23:08 +00:00
Mike Inouye
b7d7b377fd
Detect FF functions that use parentheses.
...
Signed-off-by: Mike Inouye <mikeinouye@google.com>
2025-04-22 23:26:55 +00:00
Emily Schmidt
4b4cdf75b8
timeest: gcc refuses to parse "struct ::Yosys:..."
2025-04-22 16:49:56 +01:00
Emily Schmidt
9c9a0e3e45
add some comments to timeest
2025-04-22 16:49:56 +01:00
Martin Povišer
28c7f202ca
timeest: Add -select
2025-04-22 16:49:56 +01:00
Martin Povišer
e8196b1dda
timeest: Update help
2025-04-22 16:49:56 +01:00
Martin Povišer
c5e154e941
timeest: Fix templating
2025-04-22 16:49:56 +01:00
Martin Povišer
4323d56b9e
timeest: Fill missing header
2025-04-22 16:49:56 +01:00
Martin Povišer
386b33d192
timeest: Add command for critical path estimation
2025-04-22 16:49:56 +01:00
N. Engelhardt
f27fb1a25b
Merge pull request #5037 from YosysHQ/flatten_nocleanup
2025-04-22 15:48:45 +00:00
Emil J
a628f84ec0
Merge pull request #5044 from RonxBulld/main
...
Fixed the problem of not calling abc correctly when using libyosys.so
2025-04-22 12:38:07 +02:00
Martin Povišer
5ac833870b
Merge pull request #5047 from YosysHQ/krys/macc_v2_clean_zerowidth
...
Add $macc_v2 to clean_zerowidth skip
2025-04-22 09:08:23 +02:00
KrystalDelusion
7f8d0e31f6
Fix #5046
...
`clean_zerowidth` had skipped $macc, but not $macc_v2
2025-04-22 17:42:52 +12:00
github-actions[bot]
1788ffcaf7
Bump version
2025-04-22 00:23:01 +00:00
KrystalDelusion
1f32f980cd
Merge pull request #5025 from povik/fix-macc_v2-satgen
...
satgen: Fix $macc_v2 x-prop
2025-04-22 08:55:28 +12:00
David Anderson
af8e85b7d2
techlibs/lattice: add missing clock muxes to ECP5 block ram blackboxes
...
prjtrellis documentation shows that EBR clock inputs have optional inverters.
The bram techmap outputs those parameters, and nextpnr consumes them. But for
whatever reason, Diamond doesn't include those parameters in its blackbox
models. This makes synth_lattice fail when targeting ECP5 with a design that
maps block RAMs if you include any pass that needs cells_bb_ecp5.v's definitions.
This change fixes up the ECP5 bram blackbox models at generation time, by
adding the missing parameters back in.
Signed-off-by: David Anderson <dave@natulte.net>
2025-04-21 11:57:49 -07:00
RonxBulld
a8ae6f05ea
Fixed the problem of not calling abc correctly when using libyosys.so library (it will try to call yosys-abc as command line instead of calling abc::Abc_RealMain)
2025-04-22 00:54:51 +08:00
Emil J
6a2f2f1818
Merge pull request #5031 from suisseWalter/fix_sequential_area
...
stat: fix sequential area not being included in addition/multiplication
2025-04-21 11:02:40 +02:00
cwalter
41375a5f05
create testcase to check correct addition of areas.
2025-04-20 16:44:22 +02:00
clemens
01d80c7403
add testcase
2025-04-19 20:41:10 +02:00
Jannis Harder
31d6d0ac17
formalff: Fix -declockgate test and missing emit for memories
2025-04-18 18:57:59 +02:00
Jannis Harder
b982da9f6a
formalff: Document -declockgate option
2025-04-18 17:44:39 +02:00
Jannis Harder
bd154a7188
formalff: Add -declockgate option
2025-04-18 17:44:34 +02:00
