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Merge pull request #5055 from secworks/blocking_assignment_in_cells_sim

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Changing non clocked alway assignment to blocking.
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Emil J 2025-04-23 23:01:33 +02:00 • committed by GitHub
commit 209850e69d
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techlibs/ecp5/cells_sim.v
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@ -386,7 +386,7 @@ module TRELLIS_IO(
);
parameter DIR = "INPUT";
reg T_pd;
always @(*) if (T === 1'bz) T_pd <= 1'b0; else T_pd <= T;
always @(*) if (T === 1'bz) T_pd = 1'b0; else T_pd = T;
generate
if (DIR == "INPUT") begin