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603 commits

Author SHA1 Message Date
Stan Lee
01f0fd751f fixes for arrays 2026-03-30 12:13:50 -07:00
Stan Lee
8268a79af5 debug before assertion 2026-03-18 14:06:18 -07:00
Akash Levy
d05236907a Merge branch 'main' into sim 2026-03-03 20:58:07 -08:00
Stan Lee
da25b800bc finalized 2026-03-02 11:05:44 -08:00
Stan Lee
c459a74c13 autoscoping 2026-03-01 15:39:35 -08:00
Stan Lee
29a1c69f74 move log flush to better spot 2026-02-26 16:01:37 -08:00
Stan Lee
b11eef4fe1 fix bug 2026-02-26 16:00:27 -08:00
AdvaySingh1
b29514fafc Added built in cell alongside sim support for cell 2026-02-19 11:48:35 -08:00
Akash Levy
2b247d165b Merge from main 2026-02-13 04:14:08 -08:00
Gus Smith
1502e23371 Set solver from scratchpad or command line 2026-02-06 19:26:32 -08:00
Gus Smith
f062a0c8d6 Typo 2026-02-06 17:26:08 -08:00
Stan Lee
bea2a7d473 add few debug 2026-02-03 14:40:33 -08:00
Stan Lee
ce959ec1bb fixes 2026-02-03 12:42:33 -08:00
Stan Lee
6620d098d4 lower verbosity 2026-02-03 12:05:14 -08:00
Stan Lee
99cf75531f merge 2026-01-21 15:43:25 -08:00
Stan Lee
15026033a3 annotate original register width 2026-01-19 11:19:41 -08:00
Stan Lee
4a1af73ec0 activity pass and a vcd writer bug fix 2026-01-16 16:32:04 -08:00
Krystine Sherwin
5b317ee03c
sim.cc: Check eval err
Some cells (e.g. $macc_v2) are marked evaluable, but will raise an abort if called with `CellTypes::eval()`.
Instead of falling through to the abort, we can pass a pointer to a boolean to check for errors.
Use said check to catch `CellTypes::eval()` errors and treat them as unevaluable but otherwise continue.
Reflows the series of if checks into `if ... else if ... else` so that we can check for errors and set state in one place.
2025-12-15 12:08:07 +13:00
Mohamed Gaber
dec28f65ae
Merge remote-tracking branch 'donn/pyosys_bugfixes' into merge_pybind11 2025-10-26 02:39:43 +03:00
Jannis Harder
6a0ee6e4fb Revert sim's cycle_width default back to 10, but keep -width option 2025-10-20 14:40:05 +02:00
Miodrag Milanovic
f11a61b32b sim: Make cycle width small as possible and configurable 2025-10-16 11:37:44 +02:00
Akash Levy
652a9a63b2 Update to latest and fix all disabled tests 2025-09-28 01:33:08 -07:00
KrystalDelusion
d4071b63f7
Merge pull request #5268 from YosysHQ/krys/cutpoint_inout
Track wire drivers in cutpoint
2025-09-24 04:14:19 +12:00
Akash Levy
60d969530b Bump to latest 2025-09-21 01:10:04 -07:00
Emil J
73e47ac3fe
Merge pull request #5357 from rocallahan/builtin-ff
Instead of using `builtin_ff_cell_types()` directly, go through a method `Cell::is_builtin_ff()`
2025-09-17 11:37:16 +02:00
Robert O'Callahan
d24488d3a5 Instead of using builtin_ff_cell_types() directly, go through a method Cell::is_builtin_ff() 2025-09-17 03:24:19 +00:00
Robert O'Callahan
a7c46f7b4a Remove .c_str() calls from parameters to log_warning()/log_warning_noprefix() 2025-09-16 23:02:16 +00:00
Robert O'Callahan
5ac6858f26 Remove .c_str() from log_cmd_error() and log_file_error() parameters 2025-09-16 22:59:08 +00:00
Robert O'Callahan
d1642bf510 Update passes/sat to avoid bits() 2025-09-16 03:17:23 +00:00
Akash Levy
f5cb0c328f Bump Yosys to latest 2025-09-13 04:35:52 -07:00
Robert O'Callahan
e0ae7b7af4 Remove .c_str() calls from log()/log_error()
There are some leftovers, but this is an easy regex-based approach that removes most of them.
2025-09-11 20:59:37 +00:00
Akash Levy
a43de44f9d Merge upstream changes 2025-09-10 23:02:15 -07:00
Robert O'Callahan
d34ac0c87d Make log() use the FmtString infrastructure.
Now `log()` supports `std::string`.

We have to fix a few places where the format parameter was not a compile time constant.
This is mostly trivial.
2025-09-09 15:41:03 +02:00
Akash Levy
1b3375d8df Merge upstream in 2025-09-09 05:50:48 -07:00
Robert O'Callahan
c7df6954b9 Remove .c_str() from stringf parameters 2025-09-01 23:34:42 +00:00
Neil Deo
1122b92247 Use hardtabs 2025-08-08 11:08:20 -07:00
Neil Deo
07b54dff2b fix bad indentation 2025-08-08 10:39:25 -07:00
Neil Deo
88816e390e add clockgate to makefile, add Density to sim pass 2025-08-07 18:07:15 -07:00
Akash Levy
77be4d7be7 Bump Yosys to latest 2025-08-07 17:22:25 -07:00
Krystine Sherwin
4ac100fe13
cutpoint: Track wire drivers
Necessary to avoid multiple drivers being inserted when a blackbox has inout ports (like when importing an unknown module with `verific`).
If any bits of an inout port have a known driver, treat the port as an input.
If there are no bits with a known driver, treat the port as an output, and mark each bit as having a driver.
2025-08-06 18:11:05 +12:00
Krystine Sherwin
3959d19291
Reapply "Add groups to command reference"
This reverts commit 81f87ce6ed.
2025-08-06 13:52:12 +12:00
N. Engelhardt
81f87ce6ed
Revert "Add groups to command reference" 2025-07-23 14:41:49 +00:00
Krystine Sherwin
4ba403829b
cmdref: Groups and group names 2025-07-21 10:36:19 +12:00
Krystine Sherwin
af3c28f274
synthprop: Use override keyword
`formatted_help()` introduced the override keyword, which means that the other two methods that were marked as virtual instead raised a warning about inconsistent use of override.  This fixes that by bringing the synthprop (more) in line with the rest of the code-base.
2025-07-21 10:36:18 +12:00
Krystine Sherwin
92ab125113
cmdref: Assigning cmds to formal group
Give formal index a proper title.
Use `Pass::formatted_help()` to assign the group, but still return `false` because the help text still comes from `Pass::help()`.
Tidy up some of the affected files' includes to make use of the shared `yosys.h` includes.
2025-07-21 10:35:56 +12:00
Akash Levy
1f00bf0057 Bump yosys to latest 2025-05-15 14:44:26 -07:00
KrystalDelusion
4c72b0ecd8
Merge pull request #5116 from YosysHQ/krys/update_fst
Update fstlib
2025-05-16 09:22:52 +12:00
KrystalDelusion
f7888c607b
Merge pull request #5089 from YosysHQ/krys/cutpoint_whole
cutpoint: Re-add whole module optimization
2025-05-16 09:22:28 +12:00
Krystine Sherwin
d0b9a0cb98
sim.cc: Move cycle check
Calling `throw dst_end_of_data_exception()` when the desired number of cycles has been reached means that the fst reader can't tidy up after itself and leads to memory leaks.
This doesn't happen when the `-stop` flag is used because the `Yosys::FstData` struct tracks the end time and skips the outer callback if the simulation has gone past the desired end time.
Move cycle checking into the inner callback along with the time checking means that the outer callback no longer needs to throw an exception in order to stop checking further values, while still allowing the fst reader to finish reading and deallocate memory.
2025-05-12 12:48:01 +12:00
Krystine Sherwin
cc402ee065
libs/fst: Update upstream
libfst is no longer included in gtkwave and instead has its own repo.  There has also been some refactoring, so the patches need to update to match, as does sim.cc.
2025-05-12 10:21:06 +12:00