mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-22 00:26:40 +00:00
Code Activity
14893 commits 94 branches 53 tags 44 MiB
Commit graph

510 commits

Author SHA1 Message Date
Miodrag Milanovic
a6959d30df Use edges when explicit 2022-01-31 09:38:25 +01:00
Miodrag Milanovic
cbadfa0268 Updating initial state and checks 2022-01-31 09:19:34 +01:00
Miodrag Milanovic
190e44f0da Fix scope 2022-01-31 08:56:29 +01:00
Marcelina Kościelnicka
93508d58da Add $bmux and $demux cells. 2022-01-28 23:34:41 +01:00
Miodrag Milanovic
f04d1398e5 check if stop before start 2022-01-28 19:41:43 +01:00
Miodrag Milanovic
ecbba625c4 set initial state, only flip-flops 2022-01-28 15:59:13 +01:00
Miodrag Milanovic
cb12b7c4d8 ignore not found private signals 2022-01-28 14:20:16 +01:00
Miodrag Milanovic
81b76155d6 recursive check 2022-01-28 13:24:38 +01:00
Miodrag Milanovic
4f75a2ca1b Do actual compare 2022-01-28 12:50:41 +01:00
Miodrag Milanovic
3e35de2be1 Add more options and time handling 2022-01-28 10:18:02 +01:00
Miodrag Milanovic
40018e191b Display values of outputs 2022-01-26 16:52:36 +01:00
Miodrag Milanovic
be7be63fec Check if stimulated 2022-01-26 15:51:43 +01:00
Miodrag Milanovic
9a8939f0a4 Read fst and use data to set inputs 2022-01-26 15:50:38 +01:00
Miodrag Milanovic
ccfc00705a Add ability to write to FST file 2022-01-26 09:26:19 +01:00
Marcelina Kościelnicka
4e70c30775 FfData: some refactoring. 
- FfData now keeps track of the module and underlying cell, if any (so
  calling emit on FfData created from a cell will replace the existing cell)
- FfData implementation is split off to its own .cc file for faster
  compilation
- the "flip FF data sense by inserting inverters in front and after"
  functionality that zinit uses is moved onto FfData class and beefed up
  to have dffsr support, to support more use cases
 2021-10-07 04:24:06 +02:00
Marcelina Kościelnicka
63b9df8693 kernel/ff: Refactor FfData to enable FFs with async load. 
- *_en is split into *_ce (clock enable) and *_aload (async load aka
  latch gate enable), so both can be present at once
- has_d is removed
- has_gclk is added (to have a clear marker for $ff)
- d_is_const and val_d leftovers are removed
- async2sync, clk2fflogic, opt_dff are updated to operate correctly on
  FFs with async load
 2021-10-02 20:19:48 +02:00
Marcelina Kościelnicka
19720b970d memory: Introduce $meminit_v2 cell, with EN input. 2021-07-28 23:18:38 +02:00
Claire Xenia Wolf
0ada13cbe2 Use HTTPS for website links, gatecat email 
git ls-tree -r --name-only HEAD | xargs sed -i -rf ~/fixemails.sed

s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi;
s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi;
s/((David)\s+)+(Shah|gatecat)\s+<(dave|david|gatecat)@(symbioticeda.com|yosyshq.com|ds0.me)>/gatecat <gatecat@ds0.me>/gi;
s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi;
s,https?://www.clifford.at/yosys/|http://yosyshq.net/yosys/,https://yosyshq.net/yosys/,g;
 2021-06-09 12:16:56 +02:00
Claire Xenia Wolf
72787f52fc Fixing old e-mail addresses and deadnames 
s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi;
s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi;
s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <dave@ds0.me>/gi;
s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi;
s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g;
 2021-06-08 00:39:36 +02:00
Marcelina Kościelnicka
1c903d3e47 sim: Add wide port support. 2021-05-25 02:57:32 +02:00
Marcelina Kościelnicka
c4cc888b2c kernel/rtlil: Extract some helpers for checking memory cell types. 
There will soon be more (versioned) memory cells, so handle passes that
only care if a cell is memory-related by a simple helper call instead of
a hardcoded list.
 2021-05-22 21:43:00 +02:00
Marcelina Kościelnicka
c00a29296c sim: Avoid a crash on empty cell connection. 
Fixes #2513.
 2021-03-08 17:03:31 +01:00
Noah Moroze
90b40aa51f clk2fflogic: nice names for autogenerated signals 2021-03-02 18:28:56 -05:00
Marcelina Kościelnicka
4746ffd7b2 assertpmux: Fix crash on unused $pmux output. 
Fixes #2595.
 2021-02-22 23:30:28 +01:00
Gabriel Somlo
150b729b6f Add #include needed to build with gcc-11 
Suggested by Jeff Law <law@redhat.com>
 2020-11-26 06:12:12 -05:00
Chris Dailey
cdc802e4b7
Add rewrite_filename for sim -vcd argument. 2020-11-24 15:17:16 -05:00
N. Engelhardt
3b86b5da5f
Merge pull request #2403 from nakengelhardt/sim_timescale 
sim -vcd: add date, version, and option for timescale
 2020-10-22 14:01:24 +02:00
Marcelina Kościelnicka
b065e09045 sim: Use Mem helper. 2020-10-21 17:51:20 +02:00
Marcelina Kościelnicka
e759e301a8 clk2fflogic: Use Mem helper. 2020-10-21 17:51:20 +02:00
N. Engelhardt
1c96a0b1d5 use strftime instead of put_time for gcc 4.8 compatibility 2020-10-21 17:47:00 +02:00
N. Engelhardt
eccc48c39f wild guessing at the problem because it builds fine on my machines 2020-10-16 18:46:59 +02:00
N. Engelhardt
668d5253a5 sim -vcd: add date, version, and option for timescale 2020-10-16 18:19:58 +02:00
N. Engelhardt
3238190797 use the new isPublic() in a few places 2020-09-14 12:43:18 +02:00
Marcelina Kościelnicka
4a05cad7f8 async2sync: Support all FF types. 2020-07-30 20:22:03 +02:00
Marcelina Kościelnicka
bd959d5d9e async2sync: Refactor to use FfInitVals. 2020-07-24 11:22:31 +02:00
Marcelina Kościelnicka
abe4e9e607 clk2fflogic: Support all FF types. 2020-07-24 03:19:48 +02:00
Alberto Gonzalez
2f786fcfac
qbfsat: Add -solver-option option. 2020-07-20 21:54:56 +00:00
Marcelina Kościelnicka
03e28f7ab4 clk2fflogic: Consistently treat async control signals as negative hold. 
This fixes some dfflegalize equivalence checks, and breaks others — and
I strongly suspect the others are due to bad support for multiple
async inputs in `proc` (in particular, lack of proper support for
dlatchsr and sketchy circuits on dffsr control inputs).
 2020-07-09 18:12:47 +02:00
clairexen
e4b9e64d1b
Merge pull request #2208 from boqwxp/qbfsat-cleanup 
qbfsat: Cleanup and refactoring
 2020-07-02 17:48:37 +02:00
clairexen
d3422f8a5e
Merge pull request #2211 from YosysHQ/mwk/fix-fmcombine-ff 
fmcombine: use the master ff cell type list
 2020-07-02 17:43:48 +02:00
Alberto Gonzalez
56f98b9e3d
qbfsat: Remove useless comment and #ifndef guards. 2020-07-01 19:55:16 +00:00
Alberto Gonzalez
3345d39e6f
qbfsat: Specify default values for some options in the help message. 2020-07-01 19:55:16 +00:00
Alberto Gonzalez
95e8016811
qbfsat: Clean up external executable command lines and update temporary directory name. 2020-07-01 19:55:16 +00:00
Alberto Gonzalez
8cd60be654
qbfsat: Clean up and refactor data structures into qbfsat.h. 2020-07-01 19:55:16 +00:00
clairexen
b1707407a0
Merge pull request #2138 from boqwxp/qbfsat-oflag 
qbfsat: Add `-O[012]` options to control pre-solving simplification with ABC
 2020-07-01 16:35:27 +02:00
clairexen
2b0f6e24e2
Merge pull request #2206 from boqwxp/qbfsat-fix-name-specialization 
qbfsat: Fix name-based hole specialization
 2020-07-01 16:34:32 +02:00
Marcelina Kościelnicka
7c91f13f51 fmcombine: use the master ff cell type list 2020-06-30 21:07:17 +02:00
clairexen
3fb5b4fd8a
Merge pull request #2199 from YosysHQ/mmicko/sim_memory 
sim - error when memrd and memwr detected
 2020-06-30 17:12:51 +02:00
Alberto Gonzalez
83c595aaac
qbfsat: Add -O[012] options to control pre-solving simplification with ABC. 
Thanks to @mwk for the gate mapping part of the ABC scripts.

Co-Authored-By: Marcelina Kościelnicka <mwk@0x04.net>
 2020-06-30 06:44:17 +00:00
Alberto Gonzalez
f544a2cc84
qbfsat: Fix name-based hole specialization. 
Look for unique connections in the containing module with the $anyconst port Y SigBit on the RHS and use those. If no such connection is found, fall back to using the name of the $anyconst port Y SigBit.
 2020-06-30 01:53:21 +00:00