869 commits

Author	SHA1	Message	Date
Eddie Hung	aa693d5723	Remove handling for $pmux, since #895	2019-04-03 08:35:32 -07:00
Eddie Hung	d8465590ac	Merge remote-tracking branch 'origin/master' into xc7srl	2019-04-03 03:36:11 -07:00
Niels Moseley	263ab60b43	Liberty file parser now accepts superfluous ;	2019-03-27 15:17:58 +01:00
Niels Moseley	487cb45b87	Liberty file parser now accepts superfluous ;	2019-03-27 15:15:53 +01:00
Eddie Hung	6b90d3cf6c	Merge remote-tracking branch 'origin/master' into xc7srl	2019-03-25 13:17:22 -07:00
Niels Moseley	1f7f54e68e	spaces -> tabs	2019-03-25 14:12:04 +01:00
Niels Moseley	9d9cc8a314	EOL is now accepted as ';' replacement on lines that look like: feature_xyz(option)	2019-03-25 12:15:10 +01:00
Niels Moseley	3b3b77291a	Updated the liberty parser to accept [A:B] ranges (AST has not been updated). Liberty parser now also accepts key : value pair lines that do not end in ';'.	2019-03-24 22:54:18 +01:00
Eddie Hung	bf83c074c8	Cope with SHREG not having E port; Revert $pmux fine tune	2019-03-23 16:09:38 -07:00
Eddie Hung	098bd5758f	Add support for SHREGMAP+$mux, also fine tune $pmux	2019-03-22 23:22:19 -07:00
Eddie Hung	0895093c7c	Leftover printf	2019-03-22 19:14:04 -07:00
Eddie Hung	456295eb66	Fixes for multibit	2019-03-22 18:32:42 -07:00
Eddie Hung	03d108cd1f	Working for 1 bit	2019-03-22 17:46:49 -07:00
Eddie Hung	5597270b9e	Opt	2019-03-21 10:20:27 -07:00
Eddie Hung	2b911e270b	Fix spacing	2019-03-20 12:28:39 -07:00
Eddie Hung	505e4c2d59	Revert $__SHREG_ to orig; use $__XILINX_SHREG for variable length	2019-03-19 21:58:05 -07:00
Eddie Hung	5445cd4d00	Add support for variable length Xilinx SRL > 128	2019-03-19 17:44:33 -07:00
Eddie Hung	4cd8f02973	shregmap -tech xilinx to delete $shiftx for var length SRL	2019-03-19 15:05:08 -07:00
Eddie Hung	0ea7eba5f1	Make output port a non chain user	2019-03-19 13:08:43 -07:00
Eddie Hung	ed32119d13	Fix shregmap to correctly recognise non chain users; cleanup	2019-03-18 16:12:19 -07:00
Eddie Hung	b94db54664	shiftx NULL pointer check	2019-03-18 13:35:54 -07:00
Eddie Hung	d6d9ef0fee	Cleanup	2019-03-16 12:49:46 -07:00
Eddie Hung	fadeadb8c8	Only accept <128 for variable length, only if $shiftx exclusive	2019-03-16 08:51:13 -07:00
Eddie Hung	06f8f2654a	Working	2019-03-15 19:13:40 -07:00
Eddie Hung	8af9979aab	Revert "Add shregmap -init_msb_first and use in synth_xilinx" ... This reverts commit 26ecbc1aee.	2019-03-14 09:01:48 -07:00
Eddie Hung	f1a8e8a480	Merge remote-tracking branch 'origin/master' into xc7srl	2019-03-14 08:59:19 -07:00
Eddie Hung	26ecbc1aee	Add shregmap -init_msb_first and use in synth_xilinx	2019-03-14 08:10:02 -07:00
Eddie Hung	f7c7003a19	Merge remote-tracking branch 'origin/master' into xaig	2019-02-26 13:16:03 -08:00
Eddie Hung	7cac3b1c8b	abc9 -- multiple connections for inouts	2019-02-26 12:18:28 -08:00
Larry Doolittle	61fc411c5d	Clean up some whitepsace outliers	2019-02-26 09:39:46 -08:00
Eddie Hung	967297cd57	abc9 cleanup	2019-02-25 18:40:53 -08:00
Eddie Hung	721f6a14fb	read_aiger to accept empty string for clk_name, passable only if no latches	2019-02-25 15:34:02 -08:00
Eddie Hung	0ca3fd6a1c	abc9 not to clean after aigmap	2019-02-25 15:31:52 -08:00
Eddie Hung	51f28a6747	abc9 to call "clean" once at the end of all abc9_module() calls	2019-02-25 12:55:47 -08:00
Eddie Hung	d56f02d1fc	abc9 to use AIGER symbol table, as opposed to map file	2019-02-21 17:03:40 -08:00
Eddie Hung	2811d66dea	Revert "abc9 to write_xaiger -symbols, not -map" ... This reverts commit 04429f8152.	2019-02-21 14:58:40 -08:00
Eddie Hung	7ad9628f07	Remove irrelevant citations	2019-02-21 14:41:11 -08:00
Eddie Hung	085ed9f487	Add attribution	2019-02-21 14:40:13 -08:00
Eddie Hung	875a02a6f2	abc9 to not select anything extra, and pop selection after final clean	2019-02-21 14:38:52 -08:00
Eddie Hung	04429f8152	abc9 to write_xaiger -symbols, not -map	2019-02-21 14:28:36 -08:00
Eddie Hung	3307295488	Merge branch 'read_aiger' into xaig	2019-02-21 14:27:32 -08:00
Eddie Hung	7f8f36273a	abc9 to use &mfs	2019-02-21 13:16:24 -08:00
Eddie Hung	6b96df41bc	abc9 to only disconnect output ports of AND and NOT gates	2019-02-21 11:15:47 -08:00
Eddie Hung	7f26043caf	ABC -> ABC9	2019-02-20 17:36:57 -08:00
Eddie Hung	e5b8bb9faa	abc9 to disconnect mapped_mods POs correctly, and do not count $_NOT_	2019-02-20 17:33:35 -08:00
Eddie Hung	32853b1f8d	lut/not/and suffix to be ${lut,not,and}	2019-02-20 16:30:30 -08:00
Eddie Hung	2ca83005fb	abc9 to cope with multiple modules	2019-02-20 12:56:15 -08:00
Eddie Hung	d6b317b349	abc9 to use & syntax for -fast, and name fixes	2019-02-20 12:40:17 -08:00
Eddie Hung	62e5ff9ba8	abc9 to cope with indexed wires when creating $lut from $_NOT_	2019-02-19 16:06:03 -08:00
Eddie Hung	8158bc3f99	abc9 to replace $_NOT_ with $lut	2019-02-19 12:30:20 -08:00