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687a36af38 · Merge pull request #5711 from YosysHQ/gowin_warning · Updated 2026-02-27 13:04:27 +00:00

Branches

38e2cf7d48 · Maintain logging ABI compatiblity with YosysHQ Verific Extensions · Updated 2025-09-09 08:55:05 +00:00

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e7f210b817 · Remove .c_str() from stringf parameters · Updated 2025-09-08 16:15:32 +00:00

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5819027ce7 · Disable flaky arch/anlogic/mux test · Updated 2025-09-08 15:08:13 +00:00

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27a1257f7b · flake: add ccache for devshell · Updated 2025-09-08 10:24:27 +00:00

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93897bbdbf · Test windows-2022 · Updated 2025-09-02 21:37:29 +00:00

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11f5913da6 · Brewfile: Skip tcl-tk · Updated 2025-09-02 03:25:39 +00:00

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Included

56db7702b8 · memlib: Fix ubsan · Updated 2025-08-28 21:45:59 +00:00

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39027dd374 · fixup! check: add bufnorm invariant check · Updated 2025-08-15 10:19:03 +00:00

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1c73870f4d · synth_gatemate: add -noconstmult option · Updated 2025-08-07 07:11:06 +00:00

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41dc3e4180 · segfault: init · Updated 2025-07-28 18:01:55 +00:00

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c7df41b24e · log_help: Fix mem leaks · Updated 2025-07-23 00:24:14 +00:00

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b97e37e8e7 · icell_liberty: flops · Updated 2025-07-18 11:32:49 +00:00

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096d4c27ee · fixup! Add flex lib to vcxsrc include dirs · Updated 2025-07-16 01:55:24 +00:00

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9c1ba188b9 · dpicall.cc: Fix sans-plugin function call · Updated 2025-06-24 23:37:40 +00:00

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7b2bf1fe2e · CODEOWNERS: add myself for verilog frontend and ast layer · Updated 2025-06-24 08:54:13 +00:00

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efde8319dc · json: add -wide mode which permits no non-trivial sigspecs · Updated 2025-06-21 14:47:36 +00:00

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09dd419183 · wip · Updated 2025-06-07 01:06:42 +00:00

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6cd5921c2e · hashlib: break dict by reversing the iterator order · Updated 2025-05-30 14:43:55 +00:00

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33376da034 · ConstParser instead of const2ast using global state · Updated 2025-05-26 15:16:24 +00:00

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45452c18b2 · write_verilog: write module ports in order · Updated 2025-05-14 12:34:50 +00:00

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