reimplement fayalite::formal and add support to the simulator #77

Merged

programmerjake merged 3 commits from programmerjake/fayalite:simulate-formal-inputs into master

2026-06-05 08:08:47 +00:00

Author	SHA1	Message	Date
Jacob Lifshay	ffca1a279d	switch ready_valid::queue formal proofs to use formal_global_clock All checks were successful / test (pull_request) Successful in 4m15s Details / test (push) Successful in 4m47s Details	2026-06-05 00:56:24 -07:00
Jacob Lifshay	d4d9706798	reimplement fayalite::formal and add support to the simulator Add support to the simulator for running hdl asserts/assumes and being able to write to the formal global clock/reset and all any/all_const/seq that are used. This allows you to use the exact same HDL code for running a simulation and for running a formal proof.	2026-06-05 00:56:24 -07:00
Jacob Lifshay	5d68885eaf	fayalite::testing: add checked_vcd_output!()	2026-06-05 00:35:19 -07:00