add a procedural implementation of rename_execute_retire #12

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programmerjake merged 24 commits from programmerjake/cpu:rename-execute-retire into master 2026-05-22 06:58:09 +00:00

Conversation 0 Commits 24 Files changed 38 +615322 -36446

programmerjake commented 2026-04-25 01:28:55 +00:00

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Fixes: libre-chip/grant-tracking#8

Tests I added:

• Running a recursive Fibonacci number function -- checks that calls/returns/branches work correctly with canceling mis-speculated instructions. Has 2 separate tests for a CPU that has ALU/branch instructions that take 1 cycle to execute and another where the ALU/branch instructions are combinatorial so take zero cycles (ignoring the 1 clock cycle for propagating inputs/outputs between instructions).
• A slow loop that loads a bunch of values from memory, and then adds them all together. This exercises the logic for generating L2 register file reads/writes.
• Like head -n1: A loop that reads bytes from memory-mapped I/O until it gets a newline, and then writes that line of text back out through the memory-mapped I/O. This tests that memory-mapped I/O works properly and doesn't run too soon due to speculative execution.
• A loop over functions that save and restore all PowerISA GPRs to/from memory. This more thoroughly tests the L2 register file where the L2 register file runs out of unit output registers so the CPU needs to free them to continue.

You can see a prettier form of the running instructions by opening crates/cpu/tests/expected/rename_execute_retire_fibonacci_combinatorial.vcd in GTKWave and showing rename_execute_retire_test_harness.cd.clk and everything under rename_execute_retire_test_harness.dut.state_for_debug.per_insn_timeline

DONE:

• support speculative loads/stores, currently they wait until they're non-speculative to run to ensure they run in the correct order
• implement generating L2 register file writes
• add more test cases
• implement instruction execution taking time, currently all instructions run in a single cycle
• implement tracking free registers instead of always doing a search through the rename tables and the reorder buffer to determine which registers are free. I decided to use reference counting for now.

Decided it's unnecessary:

• have conditional branch prediction in mock_next_pc, with more realistic delays rather than just random

Fixes: libre-chip/grant-tracking#8 Tests I added: * Running a recursive Fibonacci number function -- checks that calls/returns/branches work correctly with canceling mis-speculated instructions. Has 2 separate tests for a CPU that has ALU/branch instructions that take 1 cycle to execute and another where the ALU/branch instructions are combinatorial so take zero cycles (ignoring the 1 clock cycle for propagating inputs/outputs between instructions). * A slow loop that loads a bunch of values from memory, and then adds them all together. This exercises the logic for generating L2 register file reads/writes. * Like `head -n1`: A loop that reads bytes from memory-mapped I/O until it gets a newline, and then writes that line of text back out through the memory-mapped I/O. This tests that memory-mapped I/O works properly and doesn't run too soon due to speculative execution. * A loop over functions that save and restore all PowerISA GPRs to/from memory. This more thoroughly tests the L2 register file where the L2 register file runs out of unit output registers so the CPU needs to free them to continue. You can see a prettier form of the running instructions by opening `crates/cpu/tests/expected/rename_execute_retire_fibonacci_combinatorial.vcd` in GTKWave and showing `rename_execute_retire_test_harness.cd.clk` and everything under `rename_execute_retire_test_harness.dut.state_for_debug.per_insn_timeline` DONE: * support speculative loads/stores, currently they wait until they're non-speculative to run to ensure they run in the correct order * implement generating L2 register file writes * add more test cases * implement instruction execution taking time, currently all instructions run in a single cycle * implement tracking free registers instead of always doing a search through the rename tables and the reorder buffer to determine which registers are free. I decided to use reference counting for now. Decided it's unnecessary: * ~~have conditional branch prediction in `mock_next_pc`, with more realistic delays rather than just random~~

programmerjake added 1 commit 2026-04-25 01:28:55 +00:00

add initial impl of rename_execute_retire; running a recursive fibonacci gives the correct output 4d21ca622b

programmerjake added 1 commit 2026-04-28 07:53:02 +00:00

WIP adding support for speculative loads/stores 9fbb517cf4

programmerjake force-pushed rename-execute-retire from 9fbb517cf4 to 52b1b625d1 2026-04-30 08:40:28 +00:00 Compare

programmerjake force-pushed rename-execute-retire from 52b1b625d1 to 7ea22dafe2 2026-05-01 00:51:16 +00:00 Compare

programmerjake force-pushed rename-execute-retire from 7ea22dafe2 to 283117d8df 2026-05-01 00:51:44 +00:00 Compare

programmerjake added 1 commit 2026-05-01 02:23:30 +00:00

update fayalite to include simulator optimizations c3679f2718

programmerjake force-pushed rename-execute-retire from c3679f2718 to ac99caa3b6 2026-05-01 06:23:29 +00:00 Compare

programmerjake force-pushed rename-execute-retire from ac99caa3b6 to 83b3f7bac9 2026-05-04 06:36:13 +00:00 Compare

programmerjake added 1 commit 2026-05-06 02:43:41 +00:00

group micro ops by the instruction they come from when retiring 09c8c194e0

programmerjake added 1 commit 2026-05-06 02:55:52 +00:00

update next_pc.vcd 4d4f8aadd7

programmerjake force-pushed rename-execute-retire from 4d4f8aadd7 to 9308e5d195 2026-05-06 04:29:10 +00:00 Compare

programmerjake added 1 commit 2026-05-06 04:52:41 +00:00

update decode_one_insn.vcd for modified instruction data structures 409ca7bf97

programmerjake added 1 commit 2026-05-07 03:12:28 +00:00

WIP adding new test for L2 reg file store fca2ff8c91

programmerjake force-pushed rename-execute-retire from fca2ff8c91 to 3300e7ca01 2026-05-08 04:44:48 +00:00 Compare

programmerjake force-pushed rename-execute-retire from 3300e7ca01 to 04e924460a 2026-05-09 03:24:05 +00:00 Compare

programmerjake force-pushed rename-execute-retire from 04e924460a to 3fbdab0862 2026-05-11 06:39:48 +00:00 Compare

programmerjake added 2 commits 2026-05-14 06:35:10 +00:00

update fayalite to get TraceAsString 7da2d776a5

WIP: updating for fayalite/redo-trace-as-string 4bfb20d1b0

programmerjake force-pushed rename-execute-retire from 4bfb20d1b0 to 0d3c41fa14 2026-05-15 05:40:11 +00:00 Compare

programmerjake added 1 commit 2026-05-19 05:22:44 +00:00

rename_execute_retire: add a head -n1 test 79ac190093

programmerjake added 1 commit 2026-05-20 01:08:56 +00:00

tests/rename_execute_retire: make loads/stores take more than one cycle to execute 2363e65564

programmerjake added 1 commit 2026-05-20 02:34:13 +00:00

tests/rename_execute_retire: add and use mock_combinational_unit 0d69666b00

programmerjake added 2 commits 2026-05-21 00:49:21 +00:00

rename_execute_retire: don't include completed instructions in space used by a unit e502dfe574

rename_execute_retire: generate l2 stores earlier to make more space in units to increase throughput 6026df8d7a

programmerjake added 2 commits 2026-05-21 06:38:28 +00:00

add test_rename_execute_retire_save_restore_gprs ... 3e08a282ec

currently it fails due to the L2 reg file running out of output registers

WIP fixing deadlock when running rename_execute_retire_save_restore_gprs ed331a3a96

programmerjake force-pushed rename-execute-retire from ed331a3a96 to bf2cb688c7 2026-05-22 00:26:19 +00:00 Compare

programmerjake added 1 commit 2026-05-22 03:28:51 +00:00

move RenameTable and ReorderBuffer into their own mods and add reference counting for l2 registers b956a68724

programmerjake force-pushed rename-execute-retire from b956a68724 to e0dc5d486b 2026-05-22 04:07:08 +00:00 Compare

programmerjake added 1 commit 2026-05-22 06:42:12 +00:00

rename_execute_retire: add reference counting for L1 registers 151683fbda

programmerjake changed title from WIP: add a procedural implementation of rename_execute_retire to add a procedural implementation of rename_execute_retire 2026-05-22 06:57:59 +00:00

programmerjake merged commit 151683fbda into master 2026-05-22 06:58:09 +00:00

programmerjake deleted branch rename-execute-retire 2026-05-22 06:58:14 +00:00

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Reference: libre-chip/cpu#12

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