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All actors programmerjake

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disable tests/reg_alloc.rs for now

#39 -Commit 921cddbe06 pushed by programmerjake

wip-splitting-reg-alloc

2025-03-19 01:19:05 +00:00

51m51s

WIP: add ArrayVec

#29 -Commit 60341e22af pushed by programmerjake

wip-splitting-reg-alloc

2025-03-23 09:38:44 +00:00

1h23m16s

WIP: add ArrayVec

#28 -Commit 60341e22af pushed by programmerjake

master

2025-03-24 21:48:57 +00:00

1h24m24s

update fayalite to latest git

#27 -Commit 2cfd54ba88 pushed by programmerjake

master

2025-03-04 06:28:56 +00:00

27m28s

switch CI to use mirrors

#26 -Commit ca3bcd7df2 pushed by programmerjake

master

2025-03-03 02:50:19 +00:00

43m26s

UnitMOp now has L2RegisterFileMOp after renaming and instead has MoveRegMOp before renaming

#25 -Commit 518284685f pushed by programmerjake

master

2025-03-01 02:13:48 +00:00

26m13s

start adding ROB

#24 -Commit 6c91d1b0b0 pushed by programmerjake

master

2025-02-28 02:50:05 +00:00

27m36s

add helper functions for creating instructions

#23 -Commit 4ff75313e7 pushed by programmerjake

master

2025-02-24 05:25:44 +00:00

26m31s

runs instructions that read other instructions' outputs

#22 -Commit 5b15f4a6b4 pushed by programmerjake

master

2025-02-24 04:19:07 +00:00

26m9s

unit_base is basically finished, implemented AddSub[I], didn't check any tests yet

#21 -Commit 3bd5c77a3f pushed by programmerjake

master

2025-02-21 04:53:19 +00:00

27m36s

WIP implementing unit_base

#20 -Commit 3f6e5cc600 pushed by programmerjake

master

2025-02-20 08:21:47 +00:00

26m12s

WIP adding unit input/output values and insn tracking

#19 -Commit 2b7e7e4946 pushed by programmerjake

master

2025-02-14 05:22:47 +00:00

26m15s

reg_alloc: add writes to rename table

#18 -Commit 1084278f34 pushed by programmerjake

master

2025-02-12 03:54:30 +00:00

26m38s

tests/reg_alloc: remove simulator debug output

#17 -Commit 294e979848 pushed by programmerjake

master

2025-02-07 06:35:33 +00:00

1h3m32s

working on reg_alloc

#16 -Commit 7efcd872b5 pushed by programmerjake

master

2025-02-07 06:09:45 +00:00

27m33s

working on reg_alloc -- wire up free_regs_tracker.alloc_out

#15 -Commit 88eff5952b pushed by programmerjake

master

2025-01-16 04:14:21 +00:00

25m56s

update to latest fayalite to include bug fix libre-chip/fayalite#16

#14 -Commit 9781f1f4c5 pushed by programmerjake

master

2025-01-16 03:42:43 +00:00

26m20s

working on reg_alloc -- selected_unit_nums should be correct now

#13 -Commit 5f7766777a pushed by programmerjake

master

2025-01-13 06:39:23 +00:00

26m6s

update to latest version of fayalite

#12 -Commit 89717f8916 pushed by programmerjake

master

2025-01-10 08:04:21 +00:00

25m46s

update fayalite to latest git

#11 -Commit 24a8b4b71b pushed by programmerjake

master

2025-01-10 04:36:33 +00:00

38m8s

start debugging reg_alloc with simulator

#10 -Commit 12481cfab3 pushed by programmerjake

master

2024-12-20 08:54:33 +00:00

25m33s

update to fayalite commit 9b06019bf54303e51989484a0cfa1641b0e9d543

#9 -Commit bf34dee043 pushed by programmerjake

master

2024-12-19 07:03:03 +00:00

26m0s

update to latest fayalite and match rust version

#8 -Commit 1761d7094e pushed by programmerjake

master

2024-12-16 05:11:25 +00:00

38m4s

WIP implementing reg_alloc

#7 -Commit b51109f4f6 pushed by programmerjake

master

2024-11-06 02:05:48 +00:00

25m51s

add repository to cache key

#6 -Commit 265b5a9cec pushed by programmerjake

master

2024-10-31 08:33:58 +00:00

4h31m55s

split deps out into separate job with cache and build z3 4.13.3

#5 -Commit 4c94f5d91a pushed by programmerjake

master

2024-10-22 07:19:59 +00:00

3h44m7s

WIP adding register allocator

#2 -Commit cb5855589f pushed by programmerjake

master

2024-10-15 05:07:29 +00:00

46m24s

add forgejo CI

#1 -Commit d0aa86e335 pushed by programmerjake

master

2024-10-15 00:18:22 +00:00

46m49s