libre-chip/cpu
3
0
Fork 2
Code Issues 1 Pull requests Projects Releases Packages Wiki Activity Actions

update fayalite for libre-chip/fayalite#68 change vcd output to have module contents under instance's name
All checks were successful
/ test (pull_request) Successful in 21m53s
Details
/ test (push) Successful in 22m5s
Details

Browse source
This commit is contained in:
Jacob Lifshay 2026-03-26 19:21:52 -07:00
parent a1147f0f05
commit 6ed04c809e
Signed by: programmerjake
SSH key fingerprint: SHA256:HnFTLGpSm4Q4Fj502oCFisjZSoakwEuTsJJMSke63RQ
10 changed files with 482113 additions and 958901 deletions
Download patch file Download diff file Expand all files Collapse all files

8
Cargo.lock generated
View file

@ -388,7 +388,7 @@ checksum = "e8c02a5121d4ea3eb16a80748c74f5549a5665e4c21333c6098f283870fbdea6"
[[package]]
name = "fayalite"
version = "0.3.0"
source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#2aa41137d4eec592bd591fddb558bc78a52c635c"
source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#80b92c7dd3adcad8487a3f8224846e381219bfa6"
dependencies = [
"base64",
"bitvec",
@ -417,7 +417,7 @@ dependencies = [
[[package]]
name = "fayalite-proc-macros"
version = "0.3.0"
source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#2aa41137d4eec592bd591fddb558bc78a52c635c"
source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#80b92c7dd3adcad8487a3f8224846e381219bfa6"
dependencies = [
"fayalite-proc-macros-impl",
]
@ -425,7 +425,7 @@ dependencies = [
[[package]]
name = "fayalite-proc-macros-impl"
version = "0.3.0"
source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#2aa41137d4eec592bd591fddb558bc78a52c635c"
source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#80b92c7dd3adcad8487a3f8224846e381219bfa6"
dependencies = [
"base16ct 0.2.0",
"num-bigint",
@ -440,7 +440,7 @@ dependencies = [
[[package]]
name = "fayalite-visit-gen"
version = "0.3.0"
source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#2aa41137d4eec592bd591fddb558bc78a52c635c"
source = "git+https://git.libre-chip.org/libre-chip/fayalite.git?branch=master#80b92c7dd3adcad8487a3f8224846e381219bfa6"
dependencies = [
"indexmap",
"prettyplease",

16705
crates/cpu/tests/expected/fetch.vcd generated
View file

File diff suppressed because it is too large Load diff

372646
crates/cpu/tests/expected/main_memory_and_io.vcd generated
View file

File diff suppressed because it is too large Load diff

347701
crates/cpu/tests/expected/memory_interface_adapter_no_split.vcd generated
View file

File diff suppressed because it is too large Load diff

146218
crates/cpu/tests/expected/next_pc.vcd generated
View file

File diff suppressed because it is too large Load diff

100699
crates/cpu/tests/expected/receiver_and_uart_clock_gen.vcd generated
View file

File diff suppressed because it is too large Load diff

137420
crates/cpu/tests/expected/receiver_no_queue_and_uart_clock_gen.vcd generated
View file

File diff suppressed because it is too large Load diff

73376
crates/cpu/tests/expected/reg_alloc.vcd generated
View file

File diff suppressed because it is too large Load diff

232050
crates/cpu/tests/expected/simple_uart.vcd generated
View file

File diff suppressed because it is too large Load diff

14191
crates/cpu/tests/expected/transmitter_and_uart_clock_gen.vcd generated
View file

File diff suppressed because it is too large Load diff