programmerjake
  • Joined on 2024-07-08
programmerjake deleted branch make-vcd-diff-friendly from programmerjake/fayalite 2026-02-24 04:18:28 +00:00
programmerjake pushed to master at libre-chip/fayalite 2026-02-24 04:18:27 +00:00
dbed947408 change VCD id generation to be based on hashing the path, making them better for git diff
cb4e1f42c0 silence unused import warning
8c270b0e35 silence warning for enums with only one variant
Compare 3 commits »
programmerjake automatically merged pull request libre-chip/fayalite#65 2026-02-24 04:18:26 +00:00
programmerjake created pull request libre-chip/fayalite#65 2026-02-24 04:10:30 +00:00
change VCD id generation to be based on hashing the path, making them better for git diff
programmerjake created branch make-vcd-diff-friendly in programmerjake/fayalite 2026-02-24 04:08:24 +00:00
programmerjake pushed to make-vcd-diff-friendly at programmerjake/fayalite 2026-02-24 04:08:24 +00:00
dbed947408 change VCD id generation to be based on hashing the path, making them better for git diff
cb4e1f42c0 silence unused import warning
8c270b0e35 silence warning for enums with only one variant
c632e5d570 speed up simulation by optimizing SimulationImpl::read_traces
1bc835803b speed up LazyInterned by redoing caching using RwLock and add a thread-local cache
Compare 10 commits »
programmerjake commented on issue libre-chip/grant-tracking#11 2026-02-22 21:32:50 +00:00
NLnet 2024-12-324 Create the fetch and i-cache logic.

In libre-chip/cpu#9 I implemented a direct-mapped L1 I-Cache designed to be integrated into the fetch pipeline control logic from https://git.libre-chip.org/libre-c

programmerjake closed issue libre-chip/grant-tracking#11 2026-02-22 21:32:50 +00:00
NLnet 2024-12-324 Create the fetch and i-cache logic.
programmerjake merged pull request libre-chip/cpu#9 2026-02-22 02:58:21 +00:00
add fetch::fetch and fetch::l1_i_cache with some testing
programmerjake pushed to master at libre-chip/cpu 2026-02-22 02:58:21 +00:00
e69c92c8da add fetch::fetch and fetch::l1_i_cache with some testing
c62d33048c update fayalite to c632e5d570 to speed up simulation
Compare 2 commits »
programmerjake deleted branch create-fetch-and-i-cache-logic from programmerjake/cpu 2026-02-22 02:58:21 +00:00
programmerjake pushed to create-fetch-and-i-cache-logic at programmerjake/cpu 2026-02-22 02:32:37 +00:00
e69c92c8da add fetch::fetch and fetch::l1_i_cache with some testing
programmerjake pushed to create-fetch-and-i-cache-logic at programmerjake/cpu 2026-02-22 02:13:36 +00:00
198fa64899 add fetch::fetch and fetch::l1_i_cache with some testing
programmerjake created pull request libre-chip/cpu#9 2026-02-21 01:21:18 +00:00
add fetch::fetch and fetch::l1_i_cache with some testing
programmerjake pushed to create-fetch-and-i-cache-logic at programmerjake/cpu 2026-02-21 01:20:53 +00:00
fff8cf32c1 add fetch::fetch and fetch::l1_i_cache with some testing
programmerjake pushed to create-fetch-and-i-cache-logic at programmerjake/cpu 2026-02-21 01:19:10 +00:00
632010ccc6 add I-Cache
programmerjake pushed to create-fetch-and-i-cache-logic at programmerjake/cpu 2026-02-20 10:25:52 +00:00
ace4f155c3 added fetch::l1_i_cache -- WIP test
programmerjake pushed to create-fetch-and-i-cache-logic at programmerjake/cpu 2026-02-20 05:57:38 +00:00
582226c4c0 added fetch::l1_i_cache -- WIP test
programmerjake pushed to create-fetch-and-i-cache-logic at programmerjake/cpu 2026-02-19 06:08:13 +00:00
f3e4e3263d added fetch::l1_i_cache -- WIP test