Commit graph

249 commits

Author SHA1 Message Date
9b12ff54e6
WIP making progress 2025-09-03 02:56:26 -07:00
6d36698adf
move public paths of sim::{Compiled,Compiler} to sim::compiler 2025-08-26 19:23:21 -07:00
e7e831cf00
split out simulator compiler into a separate module 2025-08-26 19:17:21 -07:00
4008c311bf
format code after switching to edition 2024 2025-08-24 16:35:21 -07:00
ef85d11327
try to get actions to run 2025-08-24 16:14:03 -07:00
ae7c4be9dc
remove get_many_mut since it was stabilized in std as get_disjoint_mut 2025-08-24 15:53:21 -07:00
65f9ab32f4
switch to edition 2024 2025-08-24 15:53:21 -07:00
67e66ac3bd
upgrade to rust 1.89.0 2025-08-24 15:53:21 -07:00
668e714dc9
actually test always_zero hasher 2025-04-09 21:11:09 -07:00
88323a8c16
run some tests with always_zero hasher 2025-04-09 21:03:57 -07:00
91e1b619e8
switch to petgraph 0.8.1 now that my PR was merged and released to crates.io 2025-04-09 20:48:40 -07:00
e2d2d4110b
upgrade hashbrown to 0.15.2 2025-04-09 20:33:21 -07:00
b1f9706e4e
add custom hasher for testing 2025-04-09 20:27:22 -07:00
4eda4366c8
check types in debug mode in impl Debug for Expr, helping to catch bugs 2025-04-09 20:23:19 -07:00
122c08d3cf
add fake which for miri 2025-04-09 20:21:43 -07:00
b08a747e20
switch to using type aliases for HashMap/HashSet to allow easily switching hashers 2025-04-09 20:17:46 -07:00
e0c9939147
add test that SimValue can't be interned, since its PartialEq may ignore types 2025-04-09 19:55:09 -07:00
07725ab489
switch interning to use HashTable rather than HashMap 2025-04-09 19:30:02 -07:00
36f1b9bbb6
add derive(Debug) to all types that are interned 2025-04-09 19:24:08 -07:00
9a1b047d2f
change TypeIdMap to not use any unsafe code 2025-04-09 16:25:56 -07:00
5967e812a2
fix [SU]IntValue's PartialEq for interning
different widths must make values compare not equal otherwise interning
will e.g. substitute a 0x0_u8 for a 0x0_u2
2025-04-08 21:57:56 -07:00
001fd31451
add UIntInRange[Inclusive][Type] 2025-04-07 18:27:54 -07:00
57aae7b7fb
implement [de]serializing BaseTypes, SimValues, and support PhantomConst<T> in #[hdl] struct S<T> 2025-04-04 01:04:26 -07:00
6929352be7
re-export bitvec and add types useful for simulation to the prelude 2025-04-03 16:01:39 -07:00
62058dc141
fix cargo doc warnings -- convert urls to auto links 2025-04-01 22:22:54 -07:00
c4b6a0fee6
add support for #[hdl(sim)] enum_ty.Variant(value) and #[hdl(sim)] EnumTy::Variant(value) and non-sim variants too 2025-04-01 22:16:47 -07:00
9092e45447
fix #[hdl(sim)] match on enums 2025-03-30 01:25:07 -07:00
a40eaaa2da
expand SimValue support 2025-03-30 00:55:38 -07:00
5028401a5a
change SimValue to contain and deref to a value and not just contain bits 2025-03-27 23:44:36 -07:00
e0f978fbb6
silence unused m variable warning in #[hdl_module] with an empty body. 2025-03-27 23:17:28 -07:00
ec3a61513b
simulator read/write types must be passive 2025-03-27 23:03:44 -07:00
fdc73b5f3b
add ripple counter test to test simulating alternating circuits and extern modules 2025-03-25 18:56:26 -07:00
a115585d5a
simulator: allow external module generators to wait for value changes and/or clock edges 2025-03-25 18:26:48 -07:00
ab9ff4f2db
simplify setting an extern module simulation 2025-03-21 17:08:29 -07:00
d1bd176b28
implement simulation of extern modules 2025-03-21 01:47:14 -07:00
920d8d875f
add some missing #[track_caller] 2025-03-19 17:10:51 -07:00
d453755bb2
add ExprPartialEq/ExprPartialOrd impls for PhantomConst 2025-03-10 19:40:03 -07:00
450e1004b6
fix using fayalite as a dependency 2025-03-09 23:14:14 -07:00
c0c5b550bc
add PhantomConst 2025-03-09 21:03:47 -07:00
2fa0ea6192
make FillInDefaultedGenerics work with Sizes and not just Types 2025-03-09 20:59:21 -07:00
bd75fdfefd
add efficient prefix-sums and reductions 2025-03-02 23:04:17 -08:00
50c86e18dc
add Expr<ArrayType<T, Len>>: IntoIterator and Expr<Array<T>>: FromIterator<T> 2025-03-02 18:02:34 -08:00
60734cc9d1
switch CI to use mirrors 2025-03-02 17:43:29 -08:00
3458c21f44
add #[hdl(cmp_eq)] to implement HdlPartialEq automatically 2025-02-16 20:48:16 -08:00
43797db36e
sort custom keywords 2025-02-16 20:46:54 -08:00
cdd84953d0
support unknown trait bounds in type parameters 2025-02-13 18:35:30 -08:00
86a1bb46be
add #[hdl] let destructuring and, while at it, tuple patterns 2025-02-10 22:49:41 -08:00
209d5b5fe1
fix broken doc links 2025-02-10 22:49:16 -08:00
d4ea826051
sim: fix "label address not set" bug when the last Assignment is conditional 2025-01-15 19:04:40 -08:00
404a2ee043
tests/sim: add test_array_rw 2025-01-12 21:38:59 -08:00