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yosys/frontends
Gus Smith 09ceadfde7
Merge pull request #4269 from povik/icells_not_derived
Avoid `module_not_derived` on internal cells in techmap result
2026-01-26 14:48:40 -08:00
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aiger Remove .c_str() from parameters to log_debug() 2025-09-23 19:10:33 +12:00
aiger2 Enable xaiger2 pass when not in NDEBUG 2025-11-21 14:23:32 -08:00
ast verilog: Do not set module_not_derived on internal cells 2026-01-19 16:48:13 -08:00
blif Add gatesi_mode in BLIF format 2026-01-14 21:41:56 +01:00
json Use fast path for 32-bit Const integer constructor in more places 2025-09-16 03:17:24 +00:00
liberty read_liberty: support loopy retention cells 2025-11-20 13:21:32 +01:00
rpc Remove .c_str() from parameters to log_debug() 2025-09-23 19:10:33 +12:00
rtlil Add -legalize option to read_rtlil 2025-12-21 21:47:48 +00:00
verific verific: Fix -sv2017 message and formatting 2026-01-20 08:07:26 +01:00
verilog read_verilog: remove log I left behind by accident 2026-01-13 18:47:23 +01:00