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https://github.com/YosysHQ/yosys
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6a0682f5a0
The new pass will contain all of the logic for inserting "passthrough" product term and XOR cells as appropriate for the architecture. For example, this commit fixes connecting an input pin directly to another output pin with no logic in between.
10 lines
479 B
Makefile
10 lines
479 B
Makefile
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OBJS += techlibs/coolrunner2/synth_coolrunner2.o
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OBJS += techlibs/coolrunner2/coolrunner2_sop.o
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OBJS += techlibs/coolrunner2/coolrunner2_fixup.o
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$(eval $(call add_share_file,share/coolrunner2,techlibs/coolrunner2/cells_latch.v))
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$(eval $(call add_share_file,share/coolrunner2,techlibs/coolrunner2/cells_sim.v))
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$(eval $(call add_share_file,share/coolrunner2,techlibs/coolrunner2/tff_extract.v))
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$(eval $(call add_share_file,share/coolrunner2,techlibs/coolrunner2/xc2_dff.lib))
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