396 commits

Author	SHA1	Message	Date
Clifford Wolf	f6629b9c29	Optimize memory address port width in wreduce and memory_collect, not verilog front-end	2016-08-19 18:38:25 +02:00
Clifford Wolf	e9fe57c75e	Only allow posedge/negedge with 1 bit wide signals	2016-08-10 19:32:11 +02:00
Clifford Wolf	4056312987	Added $anyconst and $aconst	2016-07-27 15:41:22 +02:00
Clifford Wolf	a7b0769623	Added "read_verilog -dump_rtlil"	2016-07-27 15:40:17 +02:00
Clifford Wolf	7fef5ff104	Using $initstate in "initial assume" and "initial assert"	2016-07-21 14:37:28 +02:00
Clifford Wolf	5c166e76e5	Added $initstate cell type and vlog function	2016-07-21 14:23:22 +02:00
Clifford Wolf	d7763634b6	After reading the SV spec, using non-standard predict() instead of expect()	2016-07-21 13:34:33 +02:00
Clifford Wolf	721f1f5ecf	Added basic support for $expect cells	2016-07-13 16:56:17 +02:00
Clifford Wolf	9a101dc1f7	Fixed mem assignment in left-hand-side concatenation	2016-07-08 14:31:06 +02:00
Ruben Undheim	a8200a773f	A few modifications after pull request comments ... - Renamed Design::packages to Design::verilog_packages - No need to include ast.h in rtlil.h	2016-06-18 14:23:38 +02:00
Ruben Undheim	178ff3e7f6	Added support for SystemVerilog packages with localparam definitions	2016-06-18 10:53:55 +02:00
Clifford Wolf	766032c5f8	Fixed procedural assignments to non-unique lvalues, e.g. {y,y} = {a,b}	2016-05-27 17:55:03 +02:00
Clifford Wolf	ee071586c5	Fixed access-after-delete bug in mem2reg code	2016-05-27 17:25:33 +02:00
Clifford Wolf	e9ceec26ff	fixed typos in error messages	2016-05-27 16:37:36 +02:00
Clifford Wolf	570014800a	Include <cmath> in yosys.h	2016-05-08 10:50:39 +02:00
Clifford Wolf	0bc95f1e04	Added "yosys -D" feature	2016-04-21 23:28:37 +02:00
Clifford Wolf	5a09fa4553	Fixed handling of parameters and const functions in casex/casez pattern	2016-04-21 15:31:54 +02:00
Clifford Wolf	5328a85149	Do not set "nosync" on task outputs, fixes #134	2016-03-24 12:16:47 +01:00
Clifford Wolf	4f0d4899ce	Added support for $stop system task	2016-03-21 16:19:51 +01:00
Clifford Wolf	e5d42ebb4d	Added $display %m support, fixed mem leak in $display, fixes #128	2016-03-19 11:51:13 +01:00
Clifford Wolf	ef4207d5ad	Fixed localparam signdness, fixes #127	2016-03-18 12:15:00 +01:00
Clifford Wolf	b6d08f39ba	Set "nosync" attribute on internal task/function wires	2016-03-18 10:53:29 +01:00
Clifford Wolf	bcc873b805	Fixed some visual studio warnings	2016-02-13 17:31:24 +01:00
Rick Altherr	34969d4140	genrtlil: avoid converting SigSpec to set<SigBit> when going through removeSignalFromCaseTree()	2016-01-31 09:20:16 -08:00
Clifford Wolf	c86fbae3d1	Fixed handling of re-declarations of wires in tasks and functions	2015-11-23 17:09:57 +01:00
Clifford Wolf	7ae3d1b5a9	More bugfixes in handling of parameters in tasks and functions	2015-11-12 13:02:36 +01:00
Clifford Wolf	34f2b84fb6	Fixed handling of parameters and localparams in functions	2015-11-11 10:54:35 +01:00
Clifford Wolf	207736b4ee	Import more std:: stuff into Yosys namespace	2015-10-25 19:30:49 +01:00
Clifford Wolf	e51dcc83d0	Fixed complexity of assigning to vectors in constant functions	2015-10-01 12:15:35 +02:00
Clifford Wolf	9caeadf797	Fixed detection of unconditional $readmem[hb]	2015-09-30 15:46:51 +02:00
Clifford Wolf	f9d7df0869	Bugfixes in $readmem[hb]	2015-09-25 13:49:48 +02:00
Clifford Wolf	b2544cfcf7	Fixed segfault in AstNode::asReal	2015-09-25 12:38:01 +02:00
Clifford Wolf	924d9d6e86	Added read-enable to memory model	2015-09-25 12:23:11 +02:00
Clifford Wolf	1b8cb9940e	Fixed AstNode::mkconst_bits() segfault on zero-sized constant	2015-09-24 11:21:20 +02:00
Clifford Wolf	089c1e176f	Bugfix in handling of multi-dimensional memories	2015-09-23 07:56:17 +02:00
Clifford Wolf	559929e341	Warning for $display/$write outside initial block	2015-09-23 07:16:03 +02:00
Clifford Wolf	6176f4d081	Fixed multi-level prefix resolving	2015-09-22 20:52:02 +02:00
Andrew Zonenberg	c469f22144	Improvements to $display system task	2015-09-19 10:33:37 +02:00
Clifford Wolf	9db05d17fe	Added AST_INITIAL checks for $finish and $display	2015-09-18 09:50:57 +02:00
Andrew Zonenberg	7141f65533	Initial implementation of $display()	2015-09-18 09:36:46 +02:00
Andrew Zonenberg	e446e651cb	Initial implementation of $finish()	2015-09-18 09:30:25 +02:00
Clifford Wolf	eb38722e98	Fixed handling of memory read without address	2015-08-22 14:46:42 +02:00
Larry Doolittle	6c00704a5e	Another block of spelling fixes ... Smaller this time	2015-08-14 23:27:05 +02:00
Larry Doolittle	022f570563	Keep gcc from complaining about uninitialized variables	2015-08-14 23:26:49 +02:00
Clifford Wolf	84bf862f7c	Spell check (by Larry Doolittle)	2015-08-14 10:56:05 +02:00
Clifford Wolf	8d6d5c30d9	Added WORDS parameter to $meminit	2015-07-31 10:40:09 +02:00
Clifford Wolf	4513ff1b85	Fixed nested mem2reg	2015-07-29 16:37:08 +02:00
Clifford Wolf	6c84341f22	Fixed trailing whitespaces	2015-07-02 11:14:30 +02:00
Clifford Wolf	13983e8318	Fixed handling of parameters with reversed range	2015-06-08 14:03:06 +02:00
Clifford Wolf	99b8746d27	Fixed signedness of genvar expressions	2015-05-29 20:08:00 +02:00