Emil J. Tywoniak
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f7d40cf1a8
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WIP
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2026-07-17 23:48:54 +02:00 |
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Emil J. Tywoniak
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2c107f19e8
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rtlil, patch: incremental signorm via connect_incremental, replacing batched sigNormalize in Patch::patch
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2026-07-17 23:48:54 +02:00 |
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Emil J. Tywoniak
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fd67ce2b80
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WIP
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2026-07-17 23:48:54 +02:00 |
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Emil J. Tywoniak
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7652b1b52e
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opt_expr: WIP use patcher more
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2026-07-17 23:48:18 +02:00 |
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Emil J. Tywoniak
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1cedea0e60
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opt_expr: cleanup
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2026-07-17 23:48:12 +02:00 |
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Emil J. Tywoniak
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93a34b3d8b
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opt_expr: cleanup
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2026-07-17 23:48:12 +02:00 |
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Emil J. Tywoniak
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900649282f
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patch: cleanup
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2026-07-17 23:48:12 +02:00 |
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Emil J. Tywoniak
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c7467e7edd
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patch: infer leaves for gc
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2026-07-17 23:48:12 +02:00 |
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Emil J. Tywoniak
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19d007cd65
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patch: instead of cell->cell, use port->sig rewrites
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2026-07-17 23:48:12 +02:00 |
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Emil J. Tywoniak
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f12f99afa6
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opt_expr: use patcher for xor constant folding
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2026-07-17 23:48:12 +02:00 |
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Emil J. Tywoniak
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169445f54a
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patch: fix gc
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2026-07-17 23:48:06 +02:00 |
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Emil J. Tywoniak
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d01b9816b3
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patch: fix const handling
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2026-07-17 23:48:06 +02:00 |
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Emil J. Tywoniak
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c7a8fe1c79
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rtlil, patch: update signorm index and driver fields when committing Cell from Patch to Design
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2026-07-17 23:48:06 +02:00 |
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Emil J. Tywoniak
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b95565a8d9
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fixup! patch: working multi-cell signorm invariant
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2026-07-17 23:48:06 +02:00 |
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Emil J. Tywoniak
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07d5115135
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patch: source transfer
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2026-07-17 23:48:06 +02:00 |
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Emil J. Tywoniak
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71f7f586aa
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patch: working multi-cell signorm invariant
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2026-07-17 23:48:06 +02:00 |
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Emil J. Tywoniak
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e331300c58
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patch: fix patch mixins
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2026-07-17 23:48:00 +02:00 |
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Emil J. Tywoniak
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2c1d114cb1
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patch: WIP multicell patch test
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2026-07-17 23:48:00 +02:00 |
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Emil J. Tywoniak
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8818cade7a
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patch: wires
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2026-07-17 23:48:00 +02:00 |
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Emil J. Tywoniak
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9f0c1843d3
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patch: signorm, move
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2026-07-17 23:48:00 +02:00 |
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Emil J. Tywoniak
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a00631595f
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patch: unique heap
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2026-07-17 23:48:00 +02:00 |
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Emil J. Tywoniak
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277b6f47dc
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rtlil: add CellAdderMixin for shared Cell adder interface between Module and Patch
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2026-07-17 23:48:00 +02:00 |
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Emil J. Tywoniak
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fc07fd9332
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patch: GC comment
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2026-07-17 23:47:35 +02:00 |
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Emil J. Tywoniak
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240dda9186
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test_patch total basics
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2026-07-17 23:47:35 +02:00 |
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Emil J. Tywoniak
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62cd00aeeb
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rtlil: allow friends to use Wire constructors with a factory token pattern
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2026-07-17 23:47:08 +02:00 |
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Emil J. Tywoniak
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20b0a9934b
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rtlil: allow friends to use Cell constructors with a factory token pattern
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2026-07-17 23:47:08 +02:00 |
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Emil J. Tywoniak
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77dd01edfc
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patcher: start
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2026-07-17 23:47:08 +02:00 |
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Emil J. Tywoniak
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0ff91a58d0
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Revert "tests: use memory -bram-register in tests/bram"
This reverts commit 24488a7011474080bcb99a91d38ae27b2c2d813c.
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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e21e48397e
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tests: use memory -bram-register in tests/bram
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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d19258cd51
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fixup! tests: signorm fix
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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9eafc15df7
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tests: signorm fix
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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abebf4f2db
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signorm: safer indexing if broken invariant
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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628cb4f4ca
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check: check bufnorm too
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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9153c11b56
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check: check signorm indices and wires
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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f2e5bcb86a
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rtlil: publish signorm fanout
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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c9fb05efd6
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opt_merge: newcelltypes
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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6336c0a602
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opt_merge: factor out hashing code across incremental and parallel
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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a582aceaca
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opt_expr: replace invert_map with signorm traversal
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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3010c0fc31
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signorm: add timers
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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fb06c1add5
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rtlil_bufnorm: fix setup_driven_wires constant handling on unknown port direction
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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061cec3166
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check: fix memory bug in $connect
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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25e7118e4a
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memory_bram: create blackboxes
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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8042d0dc77
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Revert "intel: register bram celltypes"
This reverts commit 16785a7f75af3a9d7be9f6450edbb927ce873d4a.
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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eaa67e8d36
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Revert "tests: use memory -bram-register in tests/bram"
This reverts commit 24488a7011474080bcb99a91d38ae27b2c2d813c.
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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76d8b2c2ea
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Revert "memory: add -bram-register"
This reverts commit 2bc6ea7f37f5c239491e83a3a8672af8954550ab.
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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6f09e55c95
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Revert "memory_bram: add -register"
This reverts commit b4b5093a14e5dceded852c644e70bf6ff447bba3.
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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1f745fb781
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intel_alm: loosen tests
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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7cad14da7d
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gowin: loosen tests
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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c8208db681
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flatten: disable signorm
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2026-07-17 23:38:01 +02:00 |
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Emil J. Tywoniak
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cc1bd1d4f1
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ecp5: loosen tests
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2026-07-17 23:38:01 +02:00 |
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