Krystine Sherwin
d97a243c22
Docs: Intro to Yosys source section
2024-08-22 10:03:59 +12:00
Krystine Sherwin
e18a2f1e27
Docs: Section/folder for yosys source details
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Move test_suites page into said folder.
Placeholder page for building with verific.
2024-08-22 10:03:58 +12:00
Krystine Sherwin
2ffafadf22
Docs: Add note on verific
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Having a verific license does not provide access to the verific frontend.
2024-08-22 10:03:58 +12:00
Roland Coeurjoly
27c1432253
Remove log
2024-08-21 14:28:42 +01:00
Roland Coeurjoly
91e3773b51
Ensure signed constants are correctly parsed, represented, and exported in RTLIL. Add a test to check parsing and exporting
2024-08-21 14:28:42 +01:00
github-actions[bot]
4cddc19994
Bump version
2024-08-20 00:18:24 +00:00
Miodrag Milanović
e4c8bb0ac5
Merge pull request #4552 from YosysHQ/krys/rtd_on_main
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docs: Only trigger RTDs on main
2024-08-19 20:11:55 +02:00
Krystine Sherwin
7d779c64a3
docs: Only trigger RTDs on main
2024-08-20 04:26:58 +12:00
Emil J
d901b28d2c
Merge pull request #4546 from NachtSpyder04/main
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[Docs]:Add new cell type help messages
2024-08-19 15:50:41 +02:00
Emil J
9de534892e
Merge pull request #4515 from RCoeurjoly/nix_on_macos
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Run nix build also on macos. Build with more logs
2024-08-19 15:49:23 +02:00
Emil J
e0d3bbf3c3
Merge pull request #4452 from phsauter/shiftadd-underflow-fix
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peepopt: avoid shift-amount underflow
2024-08-19 15:45:46 +02:00
Emil J
0dfa4962d1
Merge pull request #4547 from leviathanch/fix_apicula1
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Add DQS and related primitives to Gowin tech files
2024-08-19 15:44:48 +02:00
Krystine Sherwin
6df0c3d9ec
docs: Fix synth_flow generation
2024-08-19 21:25:51 +12:00
Krystine Sherwin
8773cf7721
test-verific: Use fast runner
2024-08-19 21:24:48 +12:00
N. Engelhardt
7f08a298a4
Merge pull request #4542 from YosysHQ/krys/rtd
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Local readthedocs
2024-08-19 10:04:38 +02:00
David Lanzendörfer
d1b767ea8b
Adding missing to Gowin tech files
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Without OSER4_MEM, IDES4_MEM and DQS the synthesis of my Rocket Chip
design for my Sipeed Tang FPGA fails.
2024-08-18 19:38:31 +01:00
NachtSpyder04
aa60255e0e
update help messages that went beyond line length limit
2024-08-18 20:27:35 +05:30
Saish Karole
34aabd56cc
Apply suggestions from code review
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Co-authored-by: Martin Povišer <povik@cutebit.org>
2024-08-18 20:12:53 +05:30
Saish Karole
d80d4dc51c
[Docs]:Add new cell type help messages ( #1 )
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* add shift operators description
* update shift operations' descriptions, add desciptions for add, sub, logic_*, tribuf, mux, demux, concat, pow and comparison operators
2024-08-17 15:47:00 +05:30
github-actions[bot]
5fb3c0b1d9
Bump version
2024-08-17 00:17:44 +00:00
KrystalDelusion
3dd32d741a
Stop unconditionally building abc
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_What are the reasons/motivation for this change?_
abc builds unconditional because `check-git-abc` is a phony prerequisite and therefore always runs, and since it always runs it will always trigger abc to rebuild.
_Explain how this is achieved._
Convert `check-git-abc` to an order-only prerequisite. It still runs as before, but no longer triggers yosys-abc to rebuild when it does.
_If applicable, please suggest to reviewers how they can test the change._
2024-08-17 11:04:17 +12:00
Krystine Sherwin
7bd3c7b968
Fix test-verific.yml
2024-08-16 10:43:51 +12:00
Krystine Sherwin
3b63ab07ae
docs: Build RTD artifacts directly
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Use rtds-action instead of yosys-cmd-ref repo.
Add rtds_action to docs configuration.
Add `.readthedocs.yaml`.
Update `DOCS_USAGE_` make target to be able to use pre-generated executables without forcing a remake.
2024-08-16 10:43:51 +12:00
Miodrag Milanović
ceba889641
Merge pull request #4540 from YosysHQ/clang-11
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Replace test-compile (ubuntu-22.04, clang-11)
2024-08-15 17:39:42 +02:00
github-actions[bot]
1eaf4e0790
Bump version
2024-08-15 00:17:57 +00:00
Krystine Sherwin
d709177770
test-compile: Downgrade to focal
2024-08-15 09:44:20 +12:00
Martin Povišer
a854903ff0
Merge pull request #4537 from povik/libparse-cleanup
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Liberty parsing cleanup
2024-08-14 18:24:51 +02:00
Martin Povišer
ab5d6b06b4
read_liberty: Fix omitted helper change
2024-08-13 20:12:38 +02:00
Martin Povišer
309d80885b
read_liberty: Use available gate creation helpers
2024-08-13 18:47:36 +02:00
Martin Povišer
3057c13a66
Improve libparse encapsulation
2024-08-13 18:47:36 +02:00
Martin Povišer
c35f5e379c
Extend liberty tests
2024-08-13 18:47:36 +02:00
Martin Povišer
78382eaa6f
libparse: Adjust whitespace
2024-08-13 18:47:36 +02:00
github-actions[bot]
4b9f452735
Bump version
2024-08-13 00:19:11 +00:00
Martin Povišer
8ce6219a34
Merge pull request #4528 from povik/bump-abc
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Bump ABC
2024-08-12 15:53:16 +02:00
Martin Povišer
bcb995b506
Sync with yosys-experimental branch
2024-08-08 17:33:54 +02:00
github-actions[bot]
77b2ae2e39
Bump version
2024-08-08 00:18:08 +00:00
Martin Povišer
4b5beb635f
Pull ABC fix
2024-08-07 17:31:34 +02:00
Martin Povišer
ebffe37e4c
Bump ABC
2024-08-07 15:54:03 +02:00
Martin Povišer
b1569de537
Merge pull request #4527 from povik/exec-newline
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exec: Add missing newline
2024-08-07 13:04:48 +02:00
Martin Povišer
4c3203866f
exec: Add missing newline
2024-08-07 13:02:00 +02:00
github-actions[bot]
669f8b18f0
Bump version
2024-08-07 00:18:20 +00:00
Miodrag Milanovic
d08bf671b2
Next dev cycle
2024-08-06 09:48:35 +02:00
Miodrag Milanovic
80ba43d262
Release version 0.44
2024-08-06 09:42:28 +02:00
Miodrag Milanović
e5d8505349
Merge pull request #4523 from YosysHQ/emil/no-lto-lld
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Makefile: no LTO and lld by default
2024-08-06 09:08:09 +02:00
github-actions[bot]
d2b5788674
Bump version
2024-08-06 00:18:14 +00:00
Emil J. Tywoniak
eeecb54532
Makefile: no LTO and lld by default
2024-08-05 19:28:09 +02:00
N. Engelhardt
01b99972b4
Merge pull request #4518 from YosysHQ/micko/sim_signal_names
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Set ranges on exported wires in VCD and FST
2024-08-05 15:03:59 +02:00
Miodrag Milanovic
6d98418f3d
Set ranges on exported wires in VCD and FST
2024-08-02 15:23:00 +02:00
Roland Coeurjoly
7e34142965
Run nix build also on macos. Build with more logs
2024-07-30 22:47:30 +02:00
github-actions[bot]
c788484679
Bump version
2024-07-30 00:18:19 +00:00
