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7001 commits 122 branches 59 tags 72 MiB
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Author SHA1 Message Date
Eddie Hung
95867109ea Revert to pre-muxcover approach 2019-05-02 11:25:10 -07:00
Eddie Hung
d05ac7257e Missing help_mode 2019-05-02 11:14:28 -07:00
Eddie Hung
3b5e8c86a4 Fix -nocarry 2019-05-02 11:00:49 -07:00
Eddie Hung
5cd19b52da Merge remote-tracking branch 'origin/master' into xc7mux 2019-05-02 10:44:59 -07:00
Jim Lawson
509f729e55 Merge remote-tracking branch 'upstream/master' 2019-05-02 07:59:07 -07:00
Jakob Wenzel
98ffe5fb00 fail svinterfaces testcases on yosys error exit 2019-05-02 09:52:30 +02:00
Clifford Wolf
98925f6c4b
Merge pull request #963 from YosysHQ/eddie/synth_xilinx_fine 
Revert synth_xilinx 'fine' label more to how it used to be...
 2019-05-02 09:11:07 +02:00
Eddie Hung
485bf372e7
Merge pull request #978 from ucb-bar/fmtfirrtl 
Re-indent firrtl.cc:struct memory - no functional change.
 2019-05-01 18:24:21 -07:00
Eddie Hung
d394b9301b Back to passing all xc7srl tests! 2019-05-01 18:23:21 -07:00
Eddie Hung
31ff0d8ef5 Merge remote-tracking branch 'origin/master' into eddie/synth_xilinx_fine 2019-05-01 18:09:38 -07:00
Eddie Hung
f86d153cef Merge branch 'master' of github.com:YosysHQ/yosys 2019-05-01 16:26:43 -07:00
Jim Lawson
6ea09caf01 Re-indent firrtl.cc:struct memory - no functional change. 2019-05-01 16:21:13 -07:00
Jim Lawson
6c361bb198 Merge remote-tracking branch 'upstream/master' 2019-05-01 16:13:11 -07:00
Clifford Wolf
7a0af004a0 Merge branch 'clifford/fix883' 2019-05-02 00:04:12 +02:00
Clifford Wolf
521663f09e Add missing enable_undef to "sat -tempinduct-def", fixes #883 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-02 00:03:31 +02:00
Clifford Wolf
e8a157b47c
Merge pull request #977 from ucb-bar/fixfirrtlmem 
Fix #938 - Crash occurs in case when use write_firrtl command
 2019-05-01 23:47:16 +02:00
Jim Lawson
38f5424f92 Fix #938 - Crash occurs in case when use write_firrtl command 
Add missing memory initialization.
Sanity-check memory parameters.
Add Cell pointer to memory object (for error reporting).
 2019-05-01 13:16:01 -07:00
Clifford Wolf
93b7fd7744 Fix floating point exception in qwp, fixes #923 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-01 15:06:46 +02:00
Clifford Wolf
6bbe2fdbf3 Add splitcmplxassign test case and silence splitcmplxassign warning 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-01 10:01:54 +02:00
Clifford Wolf
3b6a02d3a7 Fix width detection of memory access with bit slice, fixes #974 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-01 09:57:26 +02:00
Clifford Wolf
e5cb9435a0 Add additional test cases for for-loops 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-01 09:32:07 +02:00
Clifford Wolf
a30b99e66e Silently resolve completely unused cell-vs-const driver-driver conflicts 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-01 09:29:34 +02:00
Clifford Wolf
59d74a3348 Re-enable "final loop assignment" feature 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-05-01 09:02:39 +02:00
Clifford Wolf
32ff37bb5a Fix segfault in wreduce 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-30 22:20:45 +02:00
Jim Lawson
58650ffe87 Merge remote-tracking branch 'upstream/master' 2019-04-30 13:19:27 -07:00
Clifford Wolf
e35fe1344d Disabled "final loop assignment" feature 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-30 20:22:50 +02:00
Clifford Wolf
9c7d23446d
Merge pull request #972 from YosysHQ/clifford/fix968 
Add final loop variable assignment when unrolling for-loops
 2019-04-30 18:09:44 +02:00
Clifford Wolf
a27eeff573
Merge pull request #966 from YosysHQ/clifford/fix956 
Drive dangling wires with init attr with their init value
 2019-04-30 18:08:41 +02:00
Clifford Wolf
5bc4de077a
Merge pull request #962 from YosysHQ/eddie/refactor_synth_xilinx 
Refactor synth_xilinx to auto-generate doc
 2019-04-30 18:07:19 +02:00
Clifford Wolf
d9d50b0b0c
Merge branch 'master' into eddie/refactor_synth_xilinx 2019-04-30 17:00:34 +02:00
Clifford Wolf
58e991a0eb
Merge pull request #973 from christian-krieg/feature/python_bindings 
Feature/python bindings cleanup
 2019-04-30 15:48:42 +02:00
Clifford Wolf
84f3a796e1 Include filename in "Executing Verilog-2005 frontend" message, fixes #959 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-30 15:37:46 +02:00
Clifford Wolf
9268cd1613 Fix performance bug in RTLIL::SigSpec::operator==(), fixes #970 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-30 15:19:10 +02:00
Clifford Wolf
9af825e31e Add final loop variable assignment when unrolling for-loops, fixes #968 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-30 15:03:32 +02:00
Clifford Wolf
9d117eba9d Add handling of init attributes in "opt_expr -undriven" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-30 14:46:12 +02:00
Benedikt Tutzer
dc06e3a28b Merge branch 'master' of https://github.com/YosysHQ/yosys into feature/python_bindings 2019-04-30 13:22:33 +02:00
Benedikt Tutzer
124a284487 Cleaned up root directory 2019-04-30 13:19:04 +02:00
Marcin Kościelnicki
98e5a625c4 synth_xilinx: Add -nocarry and -nomux options. 2019-04-30 12:54:21 +02:00
Clifford Wolf
b515fd2d25 Add peepopt_muldiv, fixes #930 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-30 11:25:15 +02:00
Clifford Wolf
4306bebe58 pmgen progress 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-30 10:51:51 +02:00
Clifford Wolf
d2d402e625 Run "peepopt" in generic "synth" pass and "synth_ice40" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-30 08:10:37 +02:00
Clifford Wolf
bb4f3642de Some pmgen reorg, rename peepopt.pmg to peepopt_shiftmul.pmg 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-30 08:04:22 +02:00
Clifford Wolf
58238da133 Progress in shiftmul peepopt pattern 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-30 07:59:39 +02:00
Clifford Wolf
314ff1e4ca
Merge pull request #960 from YosysHQ/eddie/equiv_opt_undef 
Add -undef option to equiv_opt, passed to equiv_induct
 2019-04-29 13:54:26 +02:00
Clifford Wolf
8fde245ea2
Merge pull request #967 from olegendo/depfile_esc_spaces 
escape spaces with backslash when writing dep file
 2019-04-29 13:48:52 +02:00
Clifford Wolf
ea547bcaa3 Add "peepopt" skeleton 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-29 13:38:56 +02:00
Clifford Wolf
9f792c599d Add pmgen support for multiple patterns in one matcher 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-29 13:02:05 +02:00
Oleg Endo
4f15e7f00f fix codestyle formatting 2019-04-29 19:20:33 +09:00
Clifford Wolf
32881a989c Support multiple pmg files (right now just concatenated together) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-04-29 12:09:02 +02:00
Oleg Endo
e531fb203a escape spaces with backslash when writing dep file 
filenames are sparated by spaces in the dep file.  if a filename in the
dep file contains spaces they must be escaped, otherwise the tool that
reads the dep file will see multiple wrong filenames.
 2019-04-29 16:13:34 +09:00