169 commits

Author	SHA1	Message	Date
David Shah	8ae73e60e2	Merge branch 'master' into up5k	2017-11-17 15:15:39 +00:00
Clifford Wolf	234726c655	Add "synth_ice40 -vpr"	2017-11-16 21:37:02 +01:00
David Shah	f9f3ca5da0	Add some UltraPlus cells to ice40 techlib	2017-11-16 12:24:35 +00:00
Clifford Wolf	e64b9d5a4d	Fix synth_ice40 doc regarding -top default	2017-09-29 17:52:57 +02:00
Clifford Wolf	81bdf0ad0f	iCE40 flow is not experimental anymore	2016-11-01 11:32:02 +01:00
Clifford Wolf	21659847a7	Minor fixes in ice40_ff* passes for sloppy SB_DFF instantiations	2016-07-08 14:41:36 +02:00
Clifford Wolf	df5ebfa0a0	Improved ice40_ffinit error reporting	2016-06-30 09:58:13 +02:00
Clifford Wolf	ca91bccb6b	Added "deminout"	2016-06-19 13:08:16 +02:00
Clifford Wolf	6fe3d5a1cf	Added synth_ice40 support for latches via logic loops	2016-05-06 23:02:37 +02:00
Clifford Wolf	126da0ad3d	Fixed ice40_opt lut unmapping, added "ice40_opt -unlut"	2016-05-06 14:32:32 +02:00
Clifford Wolf	a24021ea20	Converted synth_greenpak4 to ScriptPass	2016-04-23 10:27:33 +02:00
Clifford Wolf	0bc95f1e04	Added "yosys -D" feature	2016-04-21 23:28:37 +02:00
Clifford Wolf	2553319081	Added ScriptPass helper class for script-like passes	2016-03-31 11:16:34 +02:00
Clifford Wolf	ec93680bd5	Renamed opt_share to opt_merge	2016-03-31 08:52:49 +02:00
Clifford Wolf	1d0f0d668a	Renamed opt_const to opt_expr	2016-03-31 08:46:56 +02:00
Clifford Wolf	0ccfb88728	Work around DDR dout sim glitches in ice40 SB_IO sim model	2016-02-07 11:19:48 +01:00
Clifford Wolf	d69395ca08	Added dffsr2dff	2016-02-02 17:19:01 +01:00
Clifford Wolf	2ee608246f	Re-run ice40_opt in "synth_ice40 -abc2"	2015-12-22 12:19:11 +01:00
Clifford Wolf	3102ffbb83	Improvements in ice40_opt	2015-12-22 12:18:38 +01:00
Clifford Wolf	8bf452c364	Bugfix in ice40_ffinit	2015-12-22 12:18:06 +01:00
Clifford Wolf	ec93d258a4	Improved ice40_ffinit	2015-12-22 11:15:25 +01:00
Clifford Wolf	494e5f24f9	Added "synth_ice40 -abc2"	2015-12-08 11:16:26 +01:00
Clifford Wolf	4d0a6dac7b	Merge pull request #108 from cseed/master ... Added LO to ICESTORM_LC for LUT cascade route.	2015-12-07 03:32:20 +01:00
Cotton Seed	9f5b6e4cbc	Added LO to ICESTORM_LC for LUT cascade route.	2015-12-06 17:24:48 -05:00
Clifford Wolf	0793f1b196	Added ice40_ffinit pass	2015-11-26 18:11:06 +01:00
Clifford Wolf	8ff229a3ea	Fixed WE/RE usage in iCE40 BRAM mapping	2015-11-24 10:51:34 +01:00
Clifford Wolf	3ad742056b	Fixed iCE40 SB_IO OUTPUT_ENABLE vs. outena_q handling	2015-11-06 17:02:16 +01:00
Clifford Wolf	924d9d6e86	Added read-enable to memory model	2015-09-25 12:23:11 +02:00
Clifford Wolf	99ccb3180d	Fixed ice40 handling of negclk RAM40	2015-09-10 17:35:19 +02:00
Clifford Wolf	c475deec6c	Switched to Python 3	2015-08-22 09:59:33 +02:00
Clifford Wolf	9596fe74de	Another bugfix for ice40 and xilinx brams_init make rules	2015-08-16 21:39:34 +02:00
Clifford Wolf	aedcfd6fd3	Fixed Makefile rules for generated share files	2015-08-16 21:15:07 +02:00
Clifford Wolf	9c33172ece	Added tribuf command	2015-08-16 12:55:25 +02:00
Clifford Wolf	e4ef000b70	Adjust makefiles to work with out-of-tree builds ... This is based on work done by Larry Doolittle	2015-08-12 15:04:44 +02:00
Clifford Wolf	c43f38c81b	Improved handling of "keep" attributes in hierarchical designs in opt_clean	2015-08-12 14:10:14 +02:00
Marcus Comstedt	c9e56bc428	Added iCE40 WARMBOOT cell	2015-08-06 22:58:17 +02:00
Clifford Wolf	516e8828f2	Don't write a 17th memory bit in ice40/cells_sim (by Larry Doolittle)	2015-07-27 22:44:01 +02:00
Clifford Wolf	c6ca4780e2	iCE40 DFF sim models: init Q regs to 0	2015-07-20 13:05:18 +02:00
Clifford Wolf	54588a276a	Avoid tristate warning for blackbox ice40/cells_sim.v	2015-07-18 11:59:04 +02:00
Clifford Wolf	6c84341f22	Fixed trailing whitespaces	2015-07-02 11:14:30 +02:00
Clifford Wolf	df0163cd2b	iCE40: set min bram efficiency to 2%	2015-06-20 09:31:19 +02:00
Clifford Wolf	9500b564ac	synth_ice40 now flattens by default	2015-06-09 20:28:17 +02:00
Clifford Wolf	09ef279b60	Added iCE40 PLL cells	2015-05-31 13:10:43 +02:00
Clifford Wolf	c329233f0d	Added output args to synth_ice40	2015-05-26 17:08:53 +02:00
Clifford Wolf	313f570fcc	improved ice40 SB_IO sim model	2015-05-23 10:17:03 +02:00
Clifford Wolf	264eb8eb6e	Added ice40 SB_IO sim model	2015-05-23 09:30:24 +02:00
Clifford Wolf	61512b6f41	Verific build fixes	2015-05-17 08:19:52 +02:00
Clifford Wolf	9d067fecea	ice40_opt bugfix	2015-04-27 11:36:13 +02:00
Clifford Wolf	310fde197e	iCE40: SB_CARRY const fold -> unmap SB_LUT	2015-04-27 10:27:50 +02:00
Clifford Wolf	8d4a675f91	Added iCE40 const folding support for SB_CARRY	2015-04-27 08:38:14 +02:00