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4 commits

Author SHA1 Message Date
Krystine Sherwin
be05fae559 analogdevices: Extra tests 
`mem_gen.py` based on quicklogic tests.
Remove BUFG from `lutram.ys`.
Extra `sync_ram_sp` models in `arch/common/blockram.v`.
Add analogdevices to main makefile tests.
Not all the other tests are passing, but that's fine for now.
 2026-01-27 00:25:08 +00:00
Lofty
9f9835e8e3 analogdevices: DSP inference 2026-01-27 00:25:08 +00:00
Krystine Sherwin
4d9ea44818 analogdevices: Update lutram.ys test 2026-01-27 00:25:08 +00:00
Lofty
4cdabf9376 test suite 2026-01-27 00:25:08 +00:00