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									 Eddie Hung | 574812d9a5 | Merge pull request #2057 from YosysHQ/eddie/fix_task_attr verilog: support attributes before (not after) task identifier (but 13 s/r conflicts) | 2020-05-21 11:00:36 -07:00 |  | 
				
					
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									 Eddie Hung | e7fd8912f0 | tests: attributes before task enable | 2020-05-14 16:09:41 -07:00 |  | 
				
					
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									 Eddie Hung | 5bcde7ccc3 | Merge pull request #2045 from YosysHQ/eddie/fix2042 verilog: error if no direction given for task arguments, default to input in SV mode | 2020-05-14 09:45:54 -07:00 |  | 
				
					
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									 Eddie Hung | 56a5b1d2da | test: add another testcase as per @nakengelhardt | 2020-05-14 08:36:36 -07:00 |  | 
				
					
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									 Eddie Hung | 0d2c33f9f4 | tests: update/extend task argument tests | 2020-05-13 10:11:45 -07:00 |  | 
				
					
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									 Eddie Hung | e5ce5a4fd5 | tests: add #2042 testcase | 2020-05-11 11:05:19 -07:00 |  | 
				
					
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									 Eddie Hung | b11cf67a81 | Setup tests/verilog properly | 2020-05-11 10:31:02 -07:00 |  | 
				
					
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									 Eddie Hung | 004999218f | techlibs/common: more robustness when *_WIDTH = 0 | 2020-05-05 08:01:27 -07:00 |  | 
				
					
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									 Eddie Hung | 2e911bc806 | test: add failing test | 2020-05-04 12:18:02 -07:00 |  |