mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-07 18:05:24 +00:00
Code Activity

test: add failing test

Browse source
This commit is contained in:
Eddie Hung 2020-05-04 12:18:02 -07:00
parent 584780d776
commit 2e911bc806
1 changed files with 5 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
tests/verilog/upto.ys Normal file
View file

@ -0,0 +1,5 @@
read_verilog <<EOT
module top(input [-128:-65] a);
endmodule
EOT
dump