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Code Activity
15963 commits 122 branches 59 tags 72 MiB
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99 commits

Author SHA1 Message Date
Robert O'Callahan
c7df6954b9 Remove .c_str() from stringf parameters 2025-09-01 23:34:42 +00:00
Emil J. Tywoniak
fcd9f98245 equiv_simple: refactor 2025-08-08 01:35:33 +02:00
Robert O'Callahan
743df9f0f9 Fix space leak in SatGen::importSigSpecWorker() by avoiding log_id(). 
Calling `log_id()` leaks a copy of the ID into `log_id_cache` until the
end of the pass, which causes exorbitant memory usage.

See issue #5210.
 2025-07-08 23:53:38 +00:00
Jannis Harder
ed0e14820e sat: Add -set-def-formal option to force defined $any* outputs 2022-11-28 14:50:52 +01:00
Claire Xenia Wolf
72787f52fc Fixing old e-mail addresses and deadnames 
s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi;
s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi;
s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <dave@ds0.me>/gi;
s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi;
s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g;
 2021-06-08 00:39:36 +02:00
Marcelina Kościelnicka
0c6d0d4b5d satgen: Add support for dffe, sdff, sdffe, sdffce cells. 2020-07-24 03:19:21 +02:00
Marcelina Kościelnicka
85a1bb17ed satgen: Move importCell out of the header. 
This function has no hope of ever getting inlined anyway, and it speeds
up yosys compile time by 7%.
 2020-07-19 00:17:02 +02:00
Xiretza
edd8ff2c07
Add flooring division operator 
The $div and $mod cells use truncating division semantics (rounding
towards 0), as defined by e.g. Verilog. Another rounding mode, flooring
(rounding towards negative infinity), can be used in e.g. VHDL. The
new $divfloor cell provides this flooring division.

This commit also fixes the handling of $div in opt_expr, which was
previously optimized as if it was $divfloor.
 2020-05-28 22:59:04 +02:00
Xiretza
17163cf43a
Add flooring modulo operator 
The $div and $mod cells use truncating division semantics (rounding
towards 0), as defined by e.g. Verilog. Another rounding mode, flooring
(rounding towards negative infinity), can be used in e.g. VHDL. The
new $modfloor cell provides this flooring modulo (also known as "remainder"
in several languages, but this name is ambiguous).

This commit also fixes the handling of $mod in opt_expr, which was
previously optimized as if it was $modfloor.
 2020-05-28 22:59:03 +02:00
Eddie Hung
956ecd48f7 kernel: big fat patch to use more ID::*, otherwise ID(*) 2020-04-02 09:51:32 -07:00
Eddie Hung
52355f5185 Use more ID::{A,B,Y,blackbox,whitebox} 2019-08-15 14:50:10 -07:00
Eddie Hung
4cfefae21e More use of IdString::in() 2019-08-15 09:23:57 -07:00
Clifford Wolf
390bf459fb Use ID() in kernel/*, add simple ID:: hack (to be improved upon later) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-08-11 11:39:46 +02:00
Eddie Hung
71eff6f0de RTLIL::S{0,1} -> State::S{0,1} for headers 2019-08-07 11:14:03 -07:00
Clifford Wolf
023086bd46 Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-08-06 04:47:55 +02:00
Henner Zeller
3aa4484a3c Consistent use of 'override' for virtual methods in derived classes. 
o Not all derived methods were marked 'override', but it is a great
  feature of C++11 that we should make use of.
o While at it: touched header files got a -*- c++ -*- for emacs to
  provide support for that language.
o use YS_OVERRIDE for all override keywords (though we should probably
  use the plain keyword going forward now that C++11 is established)
 2018-07-20 23:51:06 -07:00
Clifford Wolf
05cdd58c8d Add $_ANDNOT_ and $_ORNOT_ gates 2017-05-17 09:08:29 +02:00
Clifford Wolf
aab58045a8 Fix undef propagation bug in $pmux SAT model 2017-02-05 22:43:33 +01:00
Clifford Wolf
bdc316db50 Added $anyseq cell type 2016-10-14 15:24:03 +02:00
Clifford Wolf
8ebba8a35f Added $ff and $_FF_ cell types 2016-10-12 01:18:39 +02:00
Clifford Wolf
8d88fcb270 Added SatGen support for $anyconst 2016-07-27 15:52:20 +02:00
Clifford Wolf
9540be1d45 Removed $predict support from SatGen 2016-07-27 15:44:11 +02:00
Clifford Wolf
89deb412c6 Added satgen initstate support 2016-07-22 10:28:45 +02:00
Clifford Wolf
5c166e76e5 Added $initstate cell type and vlog function 2016-07-21 14:23:22 +02:00
Clifford Wolf
d7763634b6 After reading the SV spec, using non-standard predict() instead of expect() 2016-07-21 13:34:33 +02:00
Clifford Wolf
721f1f5ecf Added basic support for $expect cells 2016-07-13 16:56:17 +02:00
Clifford Wolf
ebece2b8d5 Added $sop SAT model 2016-06-17 17:47:30 +02:00
Clifford Wolf
207736b4ee Import more std:: stuff into Yosys namespace 2015-10-25 19:30:49 +01:00
Clifford Wolf
6c84341f22 Fixed trailing whitespaces 2015-07-02 11:14:30 +02:00
Clifford Wolf
b005eedf36 Added $assume cell type 2015-02-26 18:04:10 +01:00
Clifford Wolf
4e6ca7760f Replaced ezDefaultSAT with ezSatPtr 2015-02-21 12:15:41 +01:00
Clifford Wolf
e9cfc4a453 Added "equiv_simple -undef" 2015-01-31 13:06:41 +01:00
Clifford Wolf
a6aa32e762 Various equiv_simple improvements 2015-01-22 13:42:04 +01:00
Clifford Wolf
34caeeb4f3 Fixed a few VS warnings 2014-10-17 06:02:38 +02:00
Clifford Wolf
bbd808072b Added format __attribute__ to stringf() 2014-10-10 17:22:08 +02:00
Clifford Wolf
7cb0d3aa1a Renamed TRUE/FALSE to CONST_TRUE/CONST_FALSE because of name collision on Win32 2014-10-10 17:07:24 +02:00
Clifford Wolf
4569a747f8 Renamed SIZE() to GetSize() because of name collision on Win32 2014-10-10 17:07:24 +02:00
Clifford Wolf
56c1d43408 satgen import sigbit api 2014-10-03 18:51:50 +02:00
Clifford Wolf
f9a307a50b namespace Yosys 2014-09-27 16:17:53 +02:00
Clifford Wolf
fcb46138ce Simplified $fa undef model 2014-09-08 16:59:39 +02:00
Clifford Wolf
af0c8873bb Added $lcu cell type 2014-09-08 13:31:04 +02:00
Clifford Wolf
d46bac3305 Added "$fa" cell type 2014-09-08 12:15:39 +02:00
Clifford Wolf
fa64942018 Added $macc SAT model 2014-09-06 19:44:11 +02:00
Clifford Wolf
8927aa6148 Removed $bu0 cell type 2014-09-04 02:07:52 +02:00
Clifford Wolf
b9cb483f3e Using $pos models for $bu0 2014-09-03 21:20:59 +02:00
Clifford Wolf
50ac284823 Fixes in $alu SAT- and eval-models 2014-09-03 13:39:46 +02:00
Clifford Wolf
c38283dbd0 Small bug fixes in $not, $neg, and $shiftx models 2014-09-02 17:48:41 +02:00
Clifford Wolf
bae09dca2b Added SAT model for $alu cells 2014-09-01 16:35:25 +02:00
Clifford Wolf
8649b57b6f Added $lut support in test_cell, techmap, satgen 2014-08-31 17:43:31 +02:00
Clifford Wolf
47c2637a96 Added additional gate types: $_NAND_ $_NOR_ $_XNOR_ $_AOI3_ $_OAI3_ $_AOI4_ $_OAI4_ 2014-08-16 18:29:39 +02:00