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11 commits

Author SHA1 Message Date
Emil J. Tywoniak
f592f2f3af WIP 2026-06-10 19:22:53 +02:00
Emil J. Tywoniak
ca632e82c4 rtlil: set Module* on inner-process AttrObjects at construction 2026-06-10 14:54:12 +02:00
Emil J. Tywoniak
f1edb571f2 rtlil: evacuate src_id_ from AttrObject to per-Design meta vector 2026-06-10 14:54:05 +02:00
Emil J. Tywoniak
3424c00cd0 twine 2026-06-10 14:53:45 +02:00
Robert O'Callahan
2d5ce8c363 Update passes/proc to avoid bits() 2025-09-16 03:17:23 +00:00
Krystine Sherwin
ab0e3cc05f
Proc: Use selections consistently
All `proc_*` passes now use the same module and process for loops, using `design->all_selected_modules()` and `mod->selected_processes()` respectively.
This simplifies the code, and makes the couple `proc_*` passes that were ignoring boxed modules stop doing that (which seems to have been erroneous rather than intentional).
2025-05-31 12:04:42 +12:00
Emil J. Tywoniak
785bd44da7 rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
Martin Povišer
7ee685a0b0 proc_rom: Set src on the emitted memory 2024-07-25 23:14:27 +01:00
Amelia Cuss
bf4a46ccb3 proc_rom: don't assert on big actionless switch.
See the test case.  PROC_ROM will consider this for evaluation, even
though -- without any actions -- lhs is empty (but still "uniform").
A zero-width memory is constructed, which later fails check with:

ERROR: Assert `width != 0' failed in kernel/mem.cc:518.

Ensure we don't proceed if there's nothing to encode.
2024-02-18 01:33:28 +11:00
Marcelina Kościelnicka
9450f308f0 proc_rom: Add special handling of const-0 address bits. 2022-05-18 17:32:30 +02:00
Marcelina Kościelnicka
990c9b8e11 Add proc_rom pass. 2022-05-13 00:37:14 +02:00